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Technical Document


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Host-Secondary PCI Express* Bridge Registers (D6:F0)
256 Datasheet
Datasheet 257
Direct Media Interface (DMI) RCRB
9 Direct Media Interface (DMI)
RCRB
This Root Complex Register Block (RCRB) controls the MCH-ICH9 serial interconnect.
The base address of this space is programmed in DMIBAR in D0:F0 configuration space.
Table 16 provides an address map of the DMI registers listed by address offset in
ascending order.
Note: IMPORTANT: All RCRB register space needs to remain organized as shown here.
Table 16. Direct Media Interface Register Address Map
Address
Offset
Register
Symbol
Register Name
Default
Value
Access
0–3h DMIVCECH
DMI Virtual Channel Enhanced
Capability
04010002h RO
4–7h DMIPVCCAP1 DMI Port VC Capability Register 1 00000001h RWO, RO
C–Dh DMIPVCCTL DMI Port VC Control 0000h RO, RW
10–13h DMIVC0RCAP DMI VC0 Resource Capability 00000001h RO
14–17h DMIVC0RCTL0 DMI VC0 Resource Control 800000FFh RO, RW
1A–1Bh DMIVC0RSTS DMI VC0 Resource Status 0002h RO
1C–1Fh DMIVC1RCAP DMI VC1 Resource Capability 00008001h RO
20–23h DMIVC1RCTL1 DMI VC1 Resource Control 01000000h RW, RO
26–27h DMIVC1RSTS DMI VC1 Resource Status 0002h RO
84–87h DMILCAP DMI Link Capabilities 00012C41h RO, RWO
88–89h DMILCTL DMI Link Control 0000h RW, RO
8A–8Bh DMILSTS DMI Link Status 0001h RO
Direct Media Interface (DMI) RCRB
258 Datasheet
9.1 DMIVCECH—DMI Virtual Channel Enhanced
Capability
B/D/F/Type: 0/0/0/DMIBAR
Address Offset: 0–3h
Default Value: 04010002h
Access: RO
Size: 32 bits
This register indicates DMI Virtual Channel capabilities.
9.2 DMIPVCCAP1—DMI Port VC Capability Register 1
B/D/F/Type: 0/0/0/DMIBAR
Address Offset: 4–7h
Default Value: 00000001h
Access: RWO, RO
Size: 32 bits
This register describes the configuration of PCI Express Virtual Channels associated
with this port.
Bit Access
Default
Value
Description
31:20 RO 040h
Pointer to Next Capability (PNC): This field contains the offset to the next
PCI Express capability structure in the linked list of capabilities (Link Declaration
Capability).
19:16 RO 1h
PCI Express Virtual Channel Capability Version (PCIEVCCV): Hardwired
to 1 to indicate compliances with the 1.1 version of the PCI Express
specification.
Note: This version does not change for 2.0 compliance.
15:0 RO 0002h
Extended Capability ID (ECID): Value of 0002 h identifies this linked list item
(capability structure) as being for PCI Express Virtual Channel registers.
Bit Access
Default
Value
Description
31:7 RO 0000000h Reserved
6:4 RO 000b
Low Priority Extended VC Count (LPEVCC): Indicates the number of
(extended) Virtual Channels in addition to the default VC belonging to the low-
priority VC (LPVC) group that has the lowest priority with respect to other VC
resources in a strict-priority VC Arbitration.
The value of 0 in this field implies strict VC arbitration.
3 RO 0b Reserved
2:0 RWO 001b
Extended VC Count (EVCC): Indicates the number of (extended) Virtual
Channels in addition to the default VC supported by the device.
The Private Virtual Channel is not included in this count.
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