Testability
340 Datasheet
4 BA37 DDR3_B_ODT3
5 BC32 DDR_B_CSB_2
6 AY34 DDR_B_CKB_5
7 AW34 DDR_B_CK_5
8 AY28 DDR_B_CKB_4
9 AY30 DDR_B_CK_4
10 AP31 DDR_B_CKB_3
11 AR31 DDR_B_CK_3
12 BA17 DDR_B_CKE_3
13 BB17 DDR_B_CKE_2
Table 74. XOR Chain 12 (DDR3,
NoECC)
Pin
Count
Ball
#
Signal Name
M22 BSEL0
1V10 DMI_TXP_3
2V11 DMI_TXN_3
3 V7 DMI_RXP_3
4V6 DMI_RXN_3
5R2 DMI_TXP_2
6T1 DMI_TXN_2
7 P4 DMI_RXP_2
8R5 DMI_RXN_2
9N2 DMI_TXP_1
10 P3 DMI_TXN_1
11 T7 DMI_RXP_1
12 T8 DMI_RXN_1
13 R7 DMI_TXP_0
14 R6 DMI_TXN_0
15 N5 DMI_RXP_0
16 M4 DMI_RXN_0
Table 73. XOR Chain 11 (DDR3,
NoECC)
Pin
Count
Ball # Signal Name
Table 75. XOR Chain 13 (DDR3,
NoECC)
Pin
Count
Ball
#
Signal Name
H21 RSVD
1A8 PEG_TXN_7
2 B7 PEG_TXP_7
3H10 PEG_RXN_7
4G10 PEG_RXP_7
5E9 PEG_TXN_6
6 D8 PEG_TXP_6
7L12 PEG_RXN_6
8K11 PEG_RXP_6
9C10 PEG_TXN_5
10 B9 PEG_TXP_5
11 G12 PEG_RXN_5
12 H12 PEG_RXP_5
13 E11 PEG_TXN_4
14 D10 PEG_TXP_4
15 M13 PEG_RXN_4
16 N13 PEG_RXP_4
17 A12 PEG_TXN_3
18 B11 PEG_TXP_3
19 K13 PEG_RXN_3
20 L13 PEG_RXP_3
21 D12 PEG_TXN_2
22 E13 PEG_TXP_2
23 G13 PEG_RXN_2
24 H13 PEG_RXP_2
25 D14 PEG_TXN_1
26 E15 PEG_TXP_1
27 C14 PEG_RXN_1
28 B13 PEG_RXP_1
29 E17 PEG_TXN_0
30 D16 PEG_TXP_0
31 B15 PEG_RXN_0
32 A16 PEG_RXP_0
33 L2 PEG_TXN_15
34 M1 PEG_TXP_15
35 N10 PEG_RXN_15
36 N8 PEG_RXP_15
37 K4 PEG_TXN_14
