
Testability
Datasheet 331
60 AN15 DDR_B_DQ_14
61 AY13 DDR_B_DQ_9
62 AW12 DDR_B_DQ_12
63 AP15 DDR_B_DQ_15
64 AY12 DDR_B_DQ_8
65 AW10 DDR_B_DQS_0
66 AW8 DDR_B_DQ_0
67 AT11 DDR_B_DQ_2
68 AW11 DDR_B_DQ_7
69 AY7 DDR_B_DQ_1
70 AW6 DDR_B_DQ_5
71 AR11 DDR_B_DQ_6
72 AT12 DDR_B_DQ_3
73 AV8 DDR_B_DQ_4
Table 58. XOR Chain 11 (DDR2,
ECC)
Pin
Count
Ball # Signal Name
L18 RSVD
1 AY35 DDR_B_ODT_3
2 BA35 DDR_B_CSB_3
3 BB33 DDR_B_ODT_2
4 BC32 DDR_B_CSB_2
5 AY34 DDR_B_CKB_5
6 AW34 DDR_B_CK_5
7 AY28 DDR_B_CKB_4
8 AY30 DDR_B_CK_4
9 AP31 DDR_B_CKB_3
10 AR31 DDR_B_CK_3
11 BA17 DDR_B_CKE_3
12 BB17 DDR_B_CKE_2
Table 57. XOR Chain 10 (DDR2,
ECC)
Pin
Count
Ball # Signal Name
Table 59. XOR Chain 12 (DDR2,
ECC)
Pin
Count
Ball
#
Signal Name
M22 BSEL0
1V10DMI_TXP_3
2V11DMI_TXN_3
3 V7 DMI_RXP_3
4 V6 DMI_RXN_3
5 R2 DMI_TXP_2
6T1DMI_TXN_2
7 P4 DMI_RXP_2
8 R5 DMI_RXN_2
9 N2 DMI_TXP_1
10 P3 DMI_TXN_1
11 T7 DMI_RXP_1
12 T8 DMI_RXN_1
13 R7 DMI_TXP_0
14 R6 DMI_TXN_0
15 N5 DMI_RXP_0
16 M4 DMI_RXN_0
Table 60. XOR Chain 13 (DDR2,
ECC)
Pin
Count
Ball
#
Signal Name
H21 RSVD
1 A8 PEG_TXN_7
2B7PEG_TXP_7
3H10PEG_RXN_7
4 G10 PEG_RXP_7
5 E9 PEG_TXN_6
6D8PEG_TXP_6
7L12PEG_RXN_6
8 K11 PEG_RXP_6
9C10PEG_TXN_5
10 B9 PEG_TXP_5
11 G12 PEG_RXN_5
12 H12 PEG_RXP_5