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TPS72518KTTT

Part # TPS72518KTTT
Description LDO Regulator Pos 1.8V 1A 6-Pin(5+Tab) TO-263 T/R - Tape a
Category RECTIFIER
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Texas Instruments
Date Code: 0410
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

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FEATURES DESCRIPTION
APPLICATIONS
1
2
3
4
5
DCQ PACKAGE
RESET/FB
OUT
GND
IN
ENABLE
SOT223-5
(TOP VIEW)
1
2
3
4
8
7
6
5
OUT
FB
GND
NC
IN
GND
GND
ENABLE
D PACKAGE
(TOP VIEW)
NC − No internal connection
1
KTT PACKAGE
(TOP VIEW)
2 3 4 5
ENABLE
IN
GND
OUT
DDPAK
RESET/FB
TPS72501
TPS72515, TPS72516
TPS72518, TPS72525
SLVS341D MAY 2002 REVISED MARCH 2004
LOW INPUT VOLTAGE, 1-A LOW-DROPOUT LINEAR REGULATORS WITH SUPERVISOR
1-A Output Current
The TPS725xx family of 1-A low-dropout (LDO) linear
regulators has fixed voltage options available that are
Available in 1.5-V, 1.6-V, 1.8-V, 2.5-V
commonly used to power the latest DSPs, FPGAs,
Fixed-Output and Adjustable Versions
and microcontrollers. An adjustable option ranging
(1.2-V to 5.5-V)
from 1.22 V to 5.5 V is also available. The integrated
Input Voltage Down to 1.8 V
supervisory circuitry provides an active low RESET
Low 170-mV Dropout Voltage at 1 A
signal when the output falls out of regulation. The no
(TPS72525)
capacitor/any capacitor feature allows the customer
to tailor output transient performance as needed.
Stable With Any Type/Value Output Capacitor
Therefore, compared to other regulators capable of
Integrated Supervisor (SVS) With 50-ms
providing the same output current, this family of
RESET Delay Time
regulators can provide a stand-alone power supply
Low 210-µA Ground Current at Full Load
solution or a post regulator for a switch mode power
supply.
(TPS72525)
Less than 1-µA Standby Current
These regulators are ideal for higher current appli-
cations. The family operates over a wide range of
±2% Output Voltage Tolerance Over Line,
input voltages (1.8 V to 6 V) and has very low
Load, and Temperature (-40°C to 125°C)
dropout (170 mV at 1-A).
Integrated UVLO
Ground current is typically 210 µA at full load and
Thermal and Overcurrent Protection
drops to less than 80 µA at no load. Standby current
5-Lead SOT223-5 or DDPAK and 8-Pin SOP
is less than 1 µA.
(TPS72501 only) Surface Mount Package
Each regulator option is available in either a
SOT223-5, D (TPS72501 only), or DDPAK package.
With a low input voltage and properly heatsinked
PCI Cards
package, the regulator dissipates more power and
Modem Banks
achieves higher efficiencies than similar regulators
Telecom Boards requiring 2.5 V or more minimum input voltage and
higher quiescent currents. These features make it a
DSP, FPGA, and Microprocessor Power
viable power supply solution for portable, bat-
Supplies
tery-powered equipment.
Portable, Battery-Powered Applications
NOTE: TPS72501 replaces RESET with FB. Tab is GND for the DCK and KTT packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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DESCRIPTION (CONTINUED)
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
TPS72501
TPS72515, TPS72516
TPS72518, TPS72525
SLVS341D MAY 2002 REVISED MARCH 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Although an output capacitor is not required for stability, transient response and output noise are improved with a
10-µF output capacitor.
Unlike some regulators that have a minimum current requirement, the TPS725 family is stable with no output
load current. The low noise capability of this family, coupled with its high current operation and ease of power
dissipation, make it ideal for telecom boards, modem banks, and other noise-sensitive applications.
ORDERING INFORMATION
T
J
VOLTAGE
(1)
SOT223-5
(2)
SYMBOL DDPAK
(3)
D
(4)
SYMBOL
Adjustable (1.2 V to 5 V) TPS72501DCQ PS72501 TPS72501KTT TPS72501D TPS72501
1.5 V TPS72515DCQ PS72515 TPS72515KTT TPS72515
-40°C to
1.6 V TPS72516DCQ PS72516 TPS72516KTT TPS72516
125°C
1.8 V TPS72518DCQ PS72518 TPS72518KTT TPS72518
2.5 V TPS72525DCQ PS72525 TPS72525KTT TPS72525
(1) Other voltage options are available upon request from the manufacturer.
(2) To order a taped and reeled part, add the suffix R to the part number (e.g., TPS72501DCQR).
(3) To order a 50-piece reel, add the suffix T (e.g., TPS72501KTTT); to order a 500-piece reel, add the suffix R (e.g., TPS72501KTTR).
(4) To order a taped and reeled part, add the suffix R or T (2500 or 500) to the part number (e.g. TPS72501DR)
over operating free-air temperature range unless otherwise noted
(1)
UNIT
Input voltage, V
I
(2)
-0.3 to 7 V
Voltage range at EN, FB -0.3 to V
I
+ 0.3 V
Voltage on OUT, RESET 6 V
ESD rating, HBM 2 kV
Continuous total power dissipation See Dissipation Ratings Table
Operating junction temperature range, T
J
-50 to 150 °C
Maximum junction temperature range, T
J
150 °C
Storage temperature, T
stg
-65 to 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
MIN NOM MAX UNIT
Input voltage, V
I
(1)
1.8 6 V
Continuous output current, I
O
0 1 A
Operating junction temperature, T
J
-40 125 °C
(1) Minimum V
I
= V
O
(nom) + V
DO
.
2
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Line regulation (mV)
%V
V
O
5.5 V V
Imin
100
1000
PACKAGE DISSIPATION RATINGS
ELECTRICAL CHARACTERISTICS
TPS72501
TPS72515, TPS72516
TPS72518, TPS72525
SLVS341D MAY 2002 REVISED MARCH 2004
PACKAGE BOARD R
θJC
R
θJA
DDPAK High K
(1)
2 °C/W 23 °C/W
SOT223 Low K
(2)
15 °C/W 53 °C/W
D-8 High K
(1)
39.4 °C/W 55 °C/W
(1) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch (7.5-cm x 7.5-cm), multilayer board with 1 ounce
internal power and ground planes and 2 ounce copper traces on top and bottom of the board.
(2) The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch (7.5-cm x 7.5-cm), two-layer board with 2 ounce
copper traces on top of the board.
over recommended operating free-air temperature range V
I
= V
O(typ)
+ 1 V, I
O
= 1 mA, EN = IN, C
o
= 1 µF, C
i
= 1 µF (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Bandgap voltage reference 1.177 1.220 1.263 V
TPS72501
0 µA < I
O
< 1 A
(1)
1.22 V V
O
5.5 V 0.965 V
O
1.035 V
O
Adjustable
T
J
= 25°C 1.5
TPS72515
0 µA< I
O
< 1 A 1.8 V V
I
5.5 V 1.47 1.53
T
J
= 25°C 1.6
TPS72516
V
O
Output voltage V
0 µA < I
O
< 1 A 2.6 V V
I
5.5 V 1.568 1.632
T
J
= 25°C 1.8
TPS72518
0 µA < I
O
< 1 A 2.8 V V
I
5.5 V 1.764 1.836
T
J
= 25°C 2.5
TPS72525
0 µA < I
O
< 1 A 3.5 V V
I
5.5 V 2.45 2.55
I
O
= 0 µA 75 120
I Ground current µA
I
O
= 1 A 210 300
EN < 0.4 V T
J
= 25°C 0.2
Standby current µA
EN < 0.4 V 1
BW = 200 Hz to 100 kHz, C
o
= 10 µF, I
O
= 1
V
n
Output noise voltage 150 µV
T
J
= 25°C mA
PSRR Ripple rejection f = 1 kHz, C
o
= 10 µF T
J
= 25°C 60 dB
Current limit
(2)
1.1 1.6 2.3 A
Output voltage line regulation
V
O
+ 1 V < V
I
5.5 V -0.15 0.02 0.15 %/V
(V
O
/V
O
)
(3)
Output voltage load regulation 0 µA < I
O
< 1 A -0.25 0.05 0.25 %/A
V
IH
EN high level input
(2)
1.3
V
V
IL
EN low level input
(2)
-0.2 0.4
I
I
EN input current EN = 0 V or V
I
0.01 100 nA
I
(FB)
Feedback current TPS72501 V
(FB)
= 1.22 -100 100 nA
UVLO threshold V
CC
rising 1.45 1.57 1.70 V
UVLO hysteresis T
J
= 25°C, V
CC
rising 50 mV
UVLO deglitch T
J
= 25°C, V
CC
rising 10 µs
UVLO delay T
J
= 25°C, V
CC
rising 100 µs
(1) Minimum IN operating voltage used for testing is V
O(typ)
+ 1 V.
(2) Test condition includes output voltage V
O
= V
O
- 15% and pulse duration = 10 ms.
(3) V
Imin
= (V
O
+ 1) or 1.8 V whichever is greater.
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