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LP3964ES-1.8

Part # LP3964ES-1.8
Description LDO Regulator Pos 1.8V 0.8A 6-Pin(5+Tab) TO-263 Rail
Category RECTIFIER
Availability In Stock
Qty 10
Qty Price
1 + $1.86988
Manufacturer Available Qty
National Semiconductor Corp
Date Code: 0418
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

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LP3961
,
LP3964
SNVS056J MAY 2000REVISED JUNE 2015
LP396x 800-mA Fast Ultra-Low-Dropout Linear Regulators
1 Features 3 Description
The LP396x series of fast ultra-low-dropout linear
1
Input Supply Voltage: 2.5 V to 7 V
regulators operate from a 2.5-V to 7-V input supply. A
Ultra-Low Dropout Voltage
wide range of preset output voltage options are
Low Ground Pin Current
available. These ultra-low dropout linear regulators
respond very fast to step changes in load which
Load Regulation of 0.02%
makes them suitable for low-voltage microprocessor
15-µA Quiescent Current in Shutdown Mode
applications. The LP3961 and LP3964 are developed
Specified Output Current of 0.8-A DC
on a CMOS process which allows low quiescent
current operation independent of output load current,
Output Voltage Accuracy ±1.5%
as well as operation under extremely low dropout
ERROR Flag Indicates Output Status (LP3961)
conditions.
Sense Option Improves Better Load Regulation
Dropout Voltage: Ultra-low dropout voltage; typically
(LP3964)
24 mV at 80-mA load current and 240 mV at 800-mA
Extremely Low Output Capacitor Requirements
load current.
Overtemperature and Overcurrent Protection
Ground Pin Current: Typically 4 mA at 800-mA load
40°C to 125°C Junction Temperature Range
current.
ERROR Flag: ERROR flag goes low when the output
2 Applications
voltage drops 10% below nominal value (for LP3961).
Microprocessor Power Supplies
SENSE: SENSE pin improves regulation at remote
GTL, GTL+, BTL, and SSTL Bus Terminators
loads (for LP3964).
Power Supplies for DSPs
Precision Output Voltage: Multiple output voltage
SCSI Terminator
options are available ranging from 1.2 V to 5 V and
Post Regulators
adjustable (LP3964), with a specified accuracy of
High-Efficiency Linear Regulators
±1.5% at room temperature, and ±3% over all
conditions (varying line, load, and temperature).
Battery Chargers
Other Battery-Powered Applications
Device Information
(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SOT-223 (5) 6.50 mm × 3.56 mm
LP3961
LP3964
TO-263 (5) 10.16 mm × 8.42 mm
LP3964 TO-220 (5) 14.986 mm × 10.16 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
space
LP3964 Typical Application Circuits
LP3961 Typical Application Circuit
A.
*
SD and ERROR pins must be pulled high
through a 10-k pullup resistor. Connect
the ERROR pin to ground if this function is
not used.
*
See note A on LP3961 Typical Application
Circuit.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LP3961
,
LP3964
SNVS056J MAY 2000REVISED JUNE 2015
www.ti.com
Table of Contents
7.4 Device Functional Modes........................................ 13
1 Features.................................................................. 1
8 Application and Implementation ........................ 14
2 Applications ........................................................... 1
8.1 Application Information .......................................... 14
3 Description ............................................................. 1
8.2 Typical Applications ................................................ 14
4 Revision History..................................................... 2
9 Power Supply Recommendations...................... 19
5 Pin Configurations and Functions....................... 3
10 Layout................................................................... 19
6 Specifications......................................................... 4
10.1 Layout Guidelines ................................................. 19
6.1 Absolute Maximum Ratings ...................................... 4
10.2 Layout Example .................................................... 19
6.2 ESD Ratings.............................................................. 4
10.3 Heatsinking TO-220 Packages ............................. 20
6.3 Recommended Operating Conditions....................... 4
11 Device and Documentation Support ................. 21
6.4 Thermal Information.................................................. 4
11.1 Related Links ........................................................ 21
6.5 Electrical Characteristics........................................... 5
11.2 Community Resources.......................................... 21
6.6 Typical Characteristics ............................................. 7
11.3 Trademarks........................................................... 21
7 Detailed Description............................................ 10
11.4 Electrostatic Discharge Caution............................ 21
7.1 Overview ................................................................. 10
11.5 Glossary................................................................ 21
7.2 Functional Block Diagram....................................... 10
12 Mechanical, Packaging, and Orderable
7.3 Feature Description................................................. 11
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (December 2014) to Revision J Page
Changed pin names to conform to TI nomenclature (V
OUT
to OUT, V
IN
to IN)....................................................................... 1
Changed "I" to "O" to correct I/O type for ERROR flag ......................................................................................................... 3
Deleted Lead temperature row - info in POA ........................................................................................................................ 4
Deleted heatsinking sections re TO-263 and SOT-223 packages; not consistent with updated thermal metrics .............. 20
Changes from Revision H (April 2013) to Revision I Page
Added Pin Configuration and Functions section, Handling Rating table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section ................................................................................................................................................................................... 1
Changes from Revision G (April 2013) to Revision H Page
2 Submit Documentation Feedback Copyright © 2000–2015, Texas Instruments Incorporated
Product Folder Links: LP3961 LP3964
LP3961
,
LP3964
www.ti.com
SNVS056J MAY 2000REVISED JUNE 2015
5 Pin Configurations and Functions
5-Pin NDC 5-Pin NDH 5-Pin KTT
SOT-223 Package TO-220 Package (LP3964) SFM/TO-263 Package
Top View Top View Top View
Pin Functions
PIN
NO.
I/O DESCRIPTION
LP3964
NAME
LP3961
TO-220
SOT-223
SFM/TO-263
ERROR 4 O ERROR flag
GND 5 5 3 Ground
IN 2 2 2 I Input supply
OUT 3 3 4 O Output voltage
SD 1 1 1 I Shutdown
SENSE/AD
4 5 I Remote sense pin or output adjust pin
J
Copyright © 2000–2015, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: LP3961 LP3964
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