Dual-Core Intel® Xeon® Processor 3000 Series Datasheet 31
Electrical Specifications
2.7.8 BCLK[1:0] Specifications (CK505 based Platforms)
Table 2-18. Front Side Bus Differential BCLK Specifications
Symbol Parameter Min Typ Max Unit Figure Notes
1
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
V
L
Input Low Voltage -0.30 N/A N/A V 2-4
2
2. "Steady state" voltage, not including overshoot or undershoot.
V
H
Input High Voltage N/A N/A 1.15 V 2-4
2
V
CROSS(abs)
Absolute Crossing Point 0.300 N/A 0.550 V 2-4, 2-5
3, 4, 5
3. Crossing voltage is defined as the instantaneous voltage value when the rising edge of BCLK0 equals the falling
edge of BCLK1.
4. V
Havg
is the statistical average of the V
H
measured by the oscilloscope.
5. The crossing point must meet the absolute and relative crossing point specifications simultaneously.
ΔV
CROSS
Range of Crossing Points N/A N/A 0.140 V 2-4, 2-5
4
V
OS
Overshoot N/A N/A 1.4 V 2-4
6
6. Overshoot is defined as the absolute value of the maximum voltage. Undershoot is defined as the absolute
value of the minimum voltage.
V
US
Undershoot -0.300 N/A N/A V 2-4
6
V
SWING
Differential Output Swing 0.300 N/A N/A V 2-6
7
7. Measurement taken from differential waveform.
I
LI
Input Leakage Current -5 N/A 5 μA
Cpad Pad Capacitance .95 1.2 1.45 pF
8
8. Cpad includes die capacitance only. No package parasitics are included.
Figure 2-4. Differential Clock Waveform
High Time
Period
V
CROSS
CLK 1
CLK 0
Low Time
V
CROSS
Min
300 mV
V
CROSS
Max
550 mV
median
V
CROSS
median
V
CROSS
Median + 75 mV
Median - 75 mV
V
CROSS
