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Technical Document


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Introduction
12 Dual-Core Intel® Xeon® Processor 3000 Series Datasheet
1.1.1 Processor Terminology
Commonly used terms are explained here for clarification:
Dual-Core Intel® Xeon® Processor 3085, 3075, 3070, 3065, and 3060
Dual core processor in the FC-LGA package with a 4 MB L2 cache.
Dual-Core Intel® Xeon® Processor 3050 and 3040 — Dual core processor in
the FC-LGA package with a 2 MB L2 cache.
Processor — For this document, the term processor is the generic form of the
Dual-Core Intel
®
Xeon
®
processor 3000 series. The processor is a single package
that contains one or more execution units.
Keep-out zone — The area on or near the processor that system design can not
use.
Processor core — Processor core die with integrated L2 cache.
LGA775 socket — The processors mate with the system board through a surface
mount, 775-land, LGA socket.
Integrated heat spreader (IHS) A component of the processor package used
to enhance the thermal performance of the package. Component thermal solutions
interface with the processor at the IHS surface.
Retention mechanism (RM) — Since the LGA775 socket does not include any
mechanical features for heatsink attach, a retention mechanism is required.
Component thermal solutions should attach to the processor via a retention
mechanism that is independent of the socket.
FSB (Front Side Bus) — The electrical interface that connects the processor to
the chipset. Also referred to as the processor system bus or the system bus. All
memory and I/O transactions as well as interrupt messages pass between the
processor and chipset over the FSB.
Storage conditions — Refers to a non-operational state. The processor may be
installed in a platform, in a tray, or loose. Processors may be sealed in packaging or
exposed to free air. Under these conditions, processor lands should not be
connected to any supply voltages, have any I/Os biased, or receive any clocks.
Upon exposure to “free air”(i.e., unsealed packaging or a device removed from
packaging material) the processor must be handled in accordance with moisture
sensitivity labeling (MSL) as indicated on the packaging material.
Functional operation — Refers to normal operating conditions in which all
processor specifications, including DC, AC, system bus, signal quality, mechanical
and thermal are satisfied.
Execute Disable Bit — The Execute Disable bit allows memory to be marked as
executable or non-executable, when combined with a supporting operating system.
If code attempts to run in non-executable memory the processor raises an error to
the operating system. This feature can prevent some classes of viruses or worms
that exploit buffer over run vulnerabilities and can thus help improve the overall
security of the system. See the Intel
®
Architecture Software Developer's Manual
for more detailed information.
Dual-Core Intel® Xeon® Processor 3000 Series Datasheet 13
Introduction
Intel® 64 Architecture — An enhancement to Intel's IA-32 architecture, allowing
the processor to execute operating systems and applications written to take
advantage of Intel 64. Further details on Intel 64 architecture and programming
model can be found in the Intel Extended Memory 64 Technology Software
Developer Guide at http://developer.intel.com/technology/64bitextensions/.
Enhanced Intel SpeedStep
®
Technology — Enhanced Intel Speedstep
®
Technology allows trade-offs to be made between performance and power
consumptions, based on processor utilization. This may lower average power
consumption (in conjunction with OS support).
Intel
®
Virtualization Technology (Intel
®
VT) — Intel Virtualization Technology
provides silicon-based functionality that works together with compatible Virtual
Machine Monitor (VMM) software to improve upon software-only solutions. Because
this virtualization hardware provides a new architecture upon which the operating
system can run directly, it removes the need for binary translation. Thus, it helps
eliminate associated performance overhead and vastly simplifies the design of the
VMM, in turn allowing VMMs to be written to common standards and to be more
robust. See the Intel
®
Virtualization Technology Specification for the IA-32 Intel
®
Architecture for more details.
Intel
®
Trusted Execution Technology (Intel
®
TXT) — A key element in Intel's
safer computing initiative which defines a set of hardware enhancements that
interoperate with an Intel
®
TXT enabled OS to help protect against software-based
attacks. Intel
®
TXT creates a hardware foundation that builds on Intel's
Virtualization Technology (VT) to help protect the confidentiality and integrity of
data stored/created on the client PC.
1.2 References
Material and concepts available in the following documents may be beneficial when
reading this document.
Document Location Notes
Intel® 3000 and 3010 Chipset Platform Design Guide
Intel® 3000 and 3010 Chipset Platform Design Guide Supplement
1
Conroe and Woodcrest Processor Family BIOS Writer's Guide (BWG)
1, 2
Dual-Core Intel® Xeon® Processor 3000 Series Thermal and Mechanical
Design Guidelines
1, 2
Voltage Regulator-Down (VRD) 11.0 Processor Power Delivery Design
Guidelines For Desktop LGA775 Socket
1
CK505 Clock Synthesizer/Driver Specification
1
LGA775 Socket Mechanical Design Guide
1
IA-32 Intel® Architecture Software Developer's Manuals
Intel
®
64 and IA-32 Architecture Software Developer’s
Manual Volume 1: Basic Architecture
Intel
®
64 and IA-32 Architecture Software Developer’s
Manual Volume 2A: Instruction Set Reference Manual A–M
Intel
®
64 and IA-32 Architecture Software Developer’s
Manual Volume 2B: Instruction Set Reference Manual, N–Z
Intel
®
64 and IA-32 Architecture Software Developer’s
Manual Volume 3A: System Programming Guide
Intel
®
64 and IA-32 Architecture Software Developer’s
Manual Volume 3B: System Programming Guide
http://
www.intel.com
/products/
processor/
manuals/
-
Conroe Processor Thermal Models
1, 2, 3
Introduction
14 Dual-Core Intel® Xeon® Processor 3000 Series Datasheet
§
Conroe Processor Enabled Components Drawings
1, 2, 4
Conroe Processor I/O Buffer Models
1, 2, 5
Conroe Processor Overshoot Checker
1, 2, 5
Debug Port Design Guide for Intel
®
975X, 3000, 3010, Bearlake and Bigby
Family Chipset Systems
1
Notes:
1. Contact your Intel representative for the latest revision and order number of this document.
2. This document may not be released as of the publication of this document.
3. Thermal models of the processor will be provided by Intel. These models are password
protected. The password is Thrm&Md%05. Contact your field sales representative for delivery
of these models.
4. The Enabled Components files are in ProE* format and are password protected with the
password Thrm&Md%05. Contact your field sales representative for delivery of these models.
5. The I/O Buffer Models are in IBIS format. Both models and the overshoot checker tool are
password protected. The password is Bf41rz&d. Contact your field sales representative for
delivery of these models.
Document Location Notes
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