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Part # 3000
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Technical Document


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Thermal Specifications and Design Considerations
84 Dual-Core Intel® Xeon® Processor 3000 Series Datasheet
the "diode" parameter and interface specifications. Two different sets of "diode"
parameters are listed in Table 5-5 and Table 5-6. The Diode Model parameters
(Table 5-5) apply to traditional thermal sensors that use the Diode Equation to
determine the processor temperature. Transistor Model parameters (Table 5-6) have
been added to support thermal sensors that use the transistor equation method. The
Transistor Model may provide more accurate temperature measurements when the
diode ideality factor is closer to the maximum or minimum limits. This thermal "diode"
is separate from the Thermal Monitor's thermal sensor and cannot be used to predict
the behavior of the Thermal Monitor.
T
CONTROL
is a temperature specification based on a temperature reading from the
thermal diode. The value for T
CONTROL
will be calibrated in manufacturing and
configured for each processor. The T
CONTROL
temperature for a given processor can be
obtained by reading a MSR in the processor. The T
CONTROL
value that is read from the
MSR needs to be converted from Hexadecimal to Decimal and added to a base value of
50 °C.
The value of T
CONTROL
may vary from 00 h to 1E h (0 to 30 °C).
When T
DIODE
is above T
CONTROL
then T
C
must be at or below T
C_MAX
as defined by the
thermal profile in Table 5-2; otherwise, the processor temperature can be maintained
at T
CONTROL
(or lower) as measured by the thermal diode.
NOTES:
1. Intel does not support or recommend operation of the thermal diode under reverse bias.
2. Preliminary data. Will be characterized across a temperature range of 50 – 80 °C.
3. Not 100% tested. Specified by design characterization.
4. The ideality factor, n, represents the deviation from ideal diode behavior as exemplified by
the diode equation:
I
FW
= I
S
* (e
qV
D
/nkT
–1)
where I
S
= saturation current, q = electronic charge, V
D
= voltage across the diode, k =
Boltzmann Constant, and T = absolute temperature (Kelvin).
5. The series resistance, R
T
, is provided to allow for a more accurate measurement of the
junction temperature. R
T
, as defined, includes the lands of the processor but does not
include any socket resistance or board trace resistance between the socket and the
external remote diode thermal sensor. R
T
can be used by remote diode thermal sensors
with automatic series resistance cancellation to calibrate out this error term. Another
application is that a temperature offset can be manually calculated and programmed into
an offset register in the remote diode thermal sensors as exemplified by the equation:
T
error
= [R
T
* (N–1) * I
FWmin
] / [nk/q * ln N]
where T
error
= sensor temperature error, N = sensor current ratio, k = Boltzmann
Constant, q = electronic charge.
Table 5-5. Thermal “Diode” Parameters using Diode Model
Symbol Parameter Min Typ Max Unit Notes
I
FW
Forward Bias Current 5 200 µA 1
n Diode Ideality Factor 1.000 1.009 1.050 - 2, 3, 4
R
T
Series Resistance 2.79 4.52 6.24 Ω 2, 3, 5
Dual-Core Intel® Xeon® Processor 3000 Series Datasheet 85
Thermal Specifications and Design Considerations
NOTES:
1. Intel does not support or recommend operation of the thermal diode under reverse bias.
2. Same as I
FW
in Table 5-5.
3. Preliminary data. Will be characterized across a temperature range of 50–80 °C.
4. Not 100% tested. Specified by design characterization.
5. The ideality factor, nQ, represents the deviation from ideal transistor model behavior as
exemplified by the equation for the collector current:
I
C
= I
S
* (e
qV
BE
/n
Q
kT
–1)
Where I
S
= saturation current, q = electronic charge, V
BE
= voltage across the transistor
base emitter junction (same nodes as VD), k = Boltzmann Constant, and T = absolute
temperature (Kelvin).
6. The series resistance, R
T,
provided in the Diode Model Table (Table 5-5) can be used for
more accurate readings as needed.
The Intel Core2 Extreme processor X6800 and Intel Core2 Duo desktop processor
E6000 and E4000 sequences do not support the diode correction offset that exists on
other Intel processors.
5.4 Platform Environment Control Interface (PECI)
5.4.1 Introduction
PECI offers an interface for thermal monitoring of Intel processor and chipset
components. It uses a single wire, thus alleviating routing congestion issues.
Figure 5-6 shows an example of the PECI topology in a system. PECI uses CRC
checking on the host side to ensure reliable transfers between the host and client
devices. Also, data transfer speeds across the PECI interface are negotiable within a
wide range (2 Kbps to 2 Mbps). The PECI interface on the processor is disabled by
default and must be enabled through BIOS. More information on this can be found in
the Conroe BIOS Writer’s Guide.
Table 5-6. Thermal “Diode” Parameters using Transistor Model
Symbol Parameter Min Typ Max Unit Notes
I
FW
Forward Bias Current 5 200 µA 1, 2
I
E
Emitter Current 5 200
n
Q
Transistor Ideality 0.997 1.001 1.005 - 3, 4, 5
Beta 0.391 0.760 3, 4
R
T
Series Resistance 2.79 4.52 6.24 Ω 3, 6
Table 7. Thermal Diode Interface
Signal Name Land Number
Signal
Description
THERMDA AL1 diode anode
THERMDC AK1 diode cathode
Thermal Specifications and Design Considerations
86 Dual-Core Intel® Xeon® Processor 3000 Series Datasheet
Figure 5-6. Processor PECI Topology
5.4.1.1 Key Difference with Legacy Diode-Based Thermal Management
Fan speed control solutions based on PECI uses a T
CONTROL
value stored in the
processor IA32_TEMPERATURE_TARGET MSR. The T
CONTROL
MSR uses the same offset
temperature format as PECI though it contains no sign bit. Thermal management
devices should infer the T
CONTROL
value as negative. Thermal management algorithms
should use the relative temperature value delivered over PECI in conjunction with the
T
CONTROL
MSR value to control or optimize fan speeds. Figure 7 shows a conceptual fan
control diagram using PECI temperatures.
The relative temperature value reported over PECI represents the delta below the onset
of thermal control circuit (TCC) activation as indicated by PROCHOT# assertions. As the
temperature approaches TCC activation, the PECI value approaches zero. TCC activates
at a PECI count of zero.
.
.
PECI Host
Controller
Land G5
30h
Domain 0
Figure 7. Conceptual Fan Control on PECI-Based Platforms
Min
Max
Fan Speed
(RPM)
T
CONTROL
Setting
TCC Activation
Temperature
PECI = 0
PECI = -10
PECI = -20
Temperature
Note: Not intended to depict actual implementation
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