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3000

Part # 3000
Description DUP RCPT PORTABLE OUTLET BX
Category LED
Availability Out of Stock
Qty 0
Qty Price
1 + $0.15000

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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Land Listing and Signal Descriptions
Dual-Core Intel® Xeon® Processor 3000 Series Datasheet 45
4 Land Listing and Signal
Descriptions
This chapter provides the processor land assignment and signal descriptions.
4.1 Processor Land Assignments
This section contains the land listings for the processor. The land-out footprint is shown
in Figure 4-1 and Figure 4-2. These figures represent the land-out arranged by land
number and they show the physical location of each signal on the package land array
(top view). Table 4-1 provides a listing of all processor lands ordered alphabetically by
land (signal) name. Table 4-2 provides a listing of all processor lands ordered by land
number.
Land Listing and Signal Descriptions
46 Dual-Core Intel® Xeon® Processor 3000 Series Datasheet
Figure 4-1. land-out Diagram (Top View – Left Side)
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15
AN
VCC VCC VSS VSS VCC VCC VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC
AM
VCC VCC VSS VSS VCC VCC VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC
AL
VCC VCC VSS VSS VCC VCC VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC
AK
VSS VSS VSS VSS VCC VCC VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC
AJ
VSS VSS VSS VSS VCC VCC VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC
AH
VCC VCC VCC VCC VCC VCC VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC
AG
VCC VCC VCC VCC VCC VCC VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC
AF
VSS VSS VSS VSS VSS VSS VSS VSS VCC VCC VSS VCC VCC VSS VSS VCC
AE
VSS VSS VSS VSS VSS VSS VSS VCC VCC VCC VSS VCC VCC VSS VSS VCC
AD
VCC VCC VCC VCC VCC VCC VCC VCC
AC
VCC VCC VCC VCC VCC VCC VCC VCC
AB
VSS VSS VSS VSS VSS VSS VSS VSS
AA
VSS VSS VSS VSS VSS VSS VSS VSS
Y
VCC VCC VCC VCC VCC VCC VCC VCC
W
VCC VCC VCC VCC VCC VCC VCC VCC
V
VSS VSS VSS VSS VSS VSS VSS VSS
U
VCC VCC VCC VCC VCC VCC VCC VCC
T
VCC VCC VCC VCC VCC VCC VCC VCC
R
VSS VSS VSS VSS VSS VSS VSS VSS
P
VSS VSS VSS VSS VSS VSS VSS VSS
N
VCC VCC VCC VCC VCC VCC VCC VCC
M
VCC VCC VCC VCC VCC VCC VCC VCC
L
VSS VSS VSS VSS VSS VSS VSS VSS
K
VCC VCC VCC VCC VCC VCC VCC VCC
J
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC FC34 FC31 VCC
H
BSEL1 FC15 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS FC33 FC32
G
BSEL2 BSEL0 BCLK1 TESTHI4 TESTHI
5
TESTHI
3
TESTHI
6
RESET# D47# D44# DSTBN2
#
DSTBP2
#
D35# D36# D32# D31#
F
RSVD BCLK0 VTT_SEL TESTHI
0
TESTHI
2
TESTHI
7
RSVD VSS D43# D41# VSS D38# D37# VSS D30#
E
FC26 VSS VSS VSS VSS FC10 RSVD D45# D42# VSS D40# D39# VSS D34# D33#
D
VTT VTT VTT VTT VTT VTT VSS VCCPLL D46# VSS D48# DBI2# VSS D49# RSVD VSS
C
VTT VTT VTT VTT VTT VTT VSS VCCIO
PLL
VSS D58# DBI3# VSS D54# DSTBP3
#
VSS D51#
B
VTT VTT VTT VTT VTT VTT VSS VSSA D63# D59# VSS D60# D57# VSS D55# D53#
A
VTT VTT VTT VTT VTT VTT FC23 VCCA D62# VSS RSVD D61# VSS D56# DSTBN3
#
VSS
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15
Land Listing and Signal Descriptions
Dual-Core Intel® Xeon® Processor 3000 Series Datasheet 47
Figure 4-2. land-out Diagram (Top View – Right Side)
14 13 12 11 10 9 8 7 6 5 4 3 2 1
VCC VSS VCC VCC VSS VCC VCC VID_SEL
ECT
VSS_MB_
REGULATION
VCC_MB_
REGULATION
VSS_
SENSE
VCC_
SENSE
VSS VSS
AN
VCC VSS VCC VCC VSS VCC VCC VID7 FC40 VID6 VSS VID2 VID0 VSS
AM
VCC VSS VCC VCC VSS VCC VCC VSS VID3 VID1 VID5 VRDSEL PROCHOT
#
THERMDA
AL
VCC VSS VCC VCC VSS VCC VCC VSS FC8 VSS VID4 ITP_CLK0 VSS THERMDC
AK
VCC VSS VCC VCC VSS VCC VCC VSS A35# A34# VSS ITP_CLK1 BPM0# BPM1#
AJ
VCC VSS VCC VCC VSS VCC VCC VSS VSS A33# A32# VSS RSVD VSS
AH
VCC VSS VCC VCC VSS VCC VCC VSS A29# A31# A30# BPM5# BPM3# TRST#
AG
VCC VSS VCC VCC VSS VCC VCC VSS VSS A27# A28# VSS BPM4# TDO
AF
VCC VSS VCC VCC VSS VCC SKTOCC# VSS RSVD VSS RSVD FC18 VSS TCK
AE
VCC VSS A22# ADSTB1# VSS FC36 BPM2# TDI
AD
VCC VSS VSS A25# RSVD VSS DBR# TMS
AC
VCC VSS A17# A24# A26# FC37 IERR# VSS
AB
VCC VSS VSS A23# A21# VSS FC39 VTT_OUT_
RIGHT
AA
VCC VSS A19# VSS A20# FC17 VSS FC0
Y
VCC VSS A18# A16# VSS TESTHI1 TESTHI12/
FC44
MSID0
W
VCC VSS VSS A14# A15# VSS RSVD MSID1
V
VCC VSS A10# A12# A13# FC30 FC29 FC28
U
VCC VSS VSS A9# A11# VSS FC4 COMP1
T
VCC VSS ADSTB0# VSS A8# FERR#/P
BE#
VSS COMP3
R
VCC VSS A4# RSVD VSS INIT# SMI# TESTHI11
P
VCC VSS VSS RSVD RSVD VSS IGNNE# PWRGOOD
N
VCC VSS REQ2# A5# A7# STPCLK# THERMTRI
P#
VSS
M
VCC VSS VSS A3# A6# VSS TESTHI13 LINT1
L
VCC VSS REQ3# VSS REQ0# A20M# VSS LINT0
K
VCC VCC VCC VCC VCC VCC VCC VSS REQ4# REQ1# VSS FC22 FC3 VTT_OUT_
LEFT
J
VSS VSS VSS VSS VSS VSS VSS VSS VSS TESTHI10 FC35 VSS GTLREF1 GTLREF0
H
D29# D27# DSTBN1# DBI1# FC38 D16# BPRI# DEFER# RSVD PECI TESTHI9/
FC43
TESTHI8/
FC42
COMP2 FC27
G
D28# VSS D24# D23# VSS D18# D17# VSS FC21 RS1# VSS BR0# FC5
F
VSS D26# DSTBP1# VSS D21# D19# VSS RSVD RSVD FC20 HITM# TRDY# VSS
E
RSVD D25# VSS D15# D22# VSS D12# D20# VSS VSS HIT# VSS ADS# RSVD
D
D52# VSS D14# D11# VSS FC38 DSTBN0# VSS D3# D1# VSS LOCK# BNR# DRDY#
C
VSS COMP8 D13# VSS D10# DSTBP0
#
VSS D6# D5# VSS D0# RS0# DBSY# VSS
B
D50# COMP0 VSS D9# D8# VSS DBI0# D7# VSS D4# D2# RS2# VSS
A
14 13 12 11 10 9 8 7 6 5 4 3 2 1
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