Computer Operating Properly (COP)
Technical Data MC68HC908AZ60A — Rev 2.0
226 Computer Operating Properly (COP) MOTOROLA
15.4.3 COPCTL Write
Writing any value to the COP control register (COPCTL) (see COP
Control Register on page 227), clears the COP counter and clears
stages 12 through 4 of the COP prescaler. Reading the COP control
register returns the reset vector.
15.4.4 Power-On Reset
The power-on reset (POR) circuit clears the COP prescaler 4096
CGMXCLK cycles after power-up.
15.4.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.
15.4.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
15.4.7 COPD
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register. (See Configuration Register (CONFIG-1) on
page 197).
15.4.8 COPL
The COPL signal reflects the state of the COP rate select bit. (COPL) in
the configuration register. (See Configuration Register (CONFIG-1) on
page 197).
