Break Module (BRK)

Technical Data MC68HC908AZ60A — Rev 2.0

208 Break Module (BRK) MOTOROLA

BRKA — Break Active Bit

This read/write status and control bit is set when a break address

match occurs. Writing a logic 1 to BRKA generates a break interrupt.

Clear BRKA by writing a logic 0 to it before exiting the break routine.

Reset clears the BRKA bit.

1 = (When read) Break address match

0 = (When read) No break address match

13.6.2 Break Address Registers

The break address registers contain the high and low bytes of the

desired breakpoint address. Reset clears the break address registers.

Address: $FE0C $FE0D

Bit 7654321Bit 0

Read:

Bit 15 14 13 12 11 10 9 Bit 8

Write:

Reset:00000000

Read:

Bit 7654321Bit 0

Write:

Reset:00000000

Figure 13-4. Break Address Registers (BRKH and BRKL)

MC68HC908AZ60A — Rev 2.0 Technical Data

MOTOROLA Monitor ROM (MON) 209

Technical Data — MC68HC908AZ60A

Section 14. Monitor ROM (MON)

14.1 Contents

14.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .209

14.3 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .209

14.4 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . .210

14.4.1 Entering Monitor Mode . . . . . . . . . . . . . . . . . . . . . . . . . .212

14.4.2 Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .213

14.4.3 Echoing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .214

14.4.4 Break Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .214

14.4.5 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .215

14.4.6 MC68HC908AS60A Baud Rate . . . . . . . . . . . . . . . . . . . .218

14.4.7 MC68HC908AZ60A Baud Rate . . . . . . . . . . . . . . . . . . . .219

14.4.8 Security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .220

14.2 Introduction

This section describes the monitor ROM (MON). The monitor ROM

allows complete testing of the MCU through a single-wire interface with

a host computer.

14.3 Features

Features of the monitor ROM include:

• Normal User-Mode Pin Functionality

• One Pin Dedicated to Serial Communication between Monitor

ROM and Host Computer

• Standard Mark/Space Non-Return-to-Zero (NRZ) Communication

with Host Computer

Monitor ROM (MON)

Technical Data MC68HC908AZ60A — Rev 2.0

210 Monitor ROM (MON) MOTOROLA

• Up to 28.8 kBaud Communication with Host Computer

• Execution of Code in RAM or FLASH

• FLASH Security

• FLASH Programming

14.4 Functional Description

Monitor ROM receives and executes commands from a host computer.

Figure 14-1 shows a sample circuit used to enter monitor mode and

communicate with a host computer via a standard RS-232 interface.

While simple monitor commands can access any memory address, the

MC68HC908AS60A and MC68HC908AZ60A have a FLASH security

feature to prevent external viewing of the contents of FLASH. Proper

procedures must be followed to verify FLASH content. Access to the

FLASH is denied to unauthorized users of customer specified software

(see Security on page 220).

In monitor mode, the MCU can execute host-computer code in RAM

while all MCU pins except PTA0 retain normal operating mode functions.

All communication between the host computer and the MCU is through

the PTA0 pin. A level-shifting and multiplexing interface is required

between PTA0 and the host computer. PTA0 is used in a wired-OR

configuration and requires a pullup resistor.

Part #	8A/S6
Description	Incandescent S Light Lamp
Category	LAMP
Availability	In Stock
Qty	2

8A/S6

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