System Integration Module (SIM)
Technical Data MC68HC908AZ60A — Rev 2.0
166 System Integration Module (SIM) MOTOROLA
9.8.1 SIM Break Status Register
The SIM break status register contains a flag to indicate that a break
caused an exit from wait mode.
BW — SIM Break Wait
This status bit is useful in applications requiring a return to wait mode
after exiting from a break interrupt. Clear BW by writing a logic 0 to it.
Reset clears BW.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
BW can be read within the break state SWI routine. The user can modify
the return address on the stack by subtracting one from it. The following
code is an example of this. Writing zero to the BW bit clears it.
Address: $FE00
Bit 7654321Bit 0
Read:
RRRRRR
BW
R
Write: See Note
Reset: 0
R = Reserved NOTE: Writing a logic 0 clears BW
Figure 9-17. SIM Break Status Register (SBSR)
;
;
;
This code works if the H register has been pushed onto the stack in the break
service routine software. This code should be executed at the end of the
break service routine software.
HIBYTE EQU 5
LOBYTE EQU 6
; If not BW, do RTI
BRCLR BW,SBSR, RETURN ;
;
See if wait mode was exited by break.
TST LOBYTE,SP ; If RETURNLO is not zero,
BNE DOLO ; then just decrement low byte.
DEC HIBYTE,SP ; Else deal with high byte, too.
DOLO DEC LOBYTE,SP ; Point to WAIT/STOP opcode.
RETURN PULH
RTI
; Restore H register.
