System Integration Module (SIM)
Program Exception Control
MC68HC908AZ60A — Rev 2.0 Technical Data
MOTOROLA System Integration Module (SIM) 157
is initialized, it enables the clock generation module (CGM) to drive the
bus clock state machine.
9.5.2 SIM Counter During Stop Mode Recovery
The SIM counter also is used for stop mode recovery. The STOP
instruction clears the SIM counter. After an interrupt or reset, the SIM
senses the state of the short stop recovery bit, SSREC, in the CONFIG-
1 register. If the SSREC bit is a logic one, then the stop recovery is
reduced from the normal delay of 4096 CGMXCLK cycles down to 32
CGMXCLK cycles. This is ideal for applications using canned oscillators
that do not require long start-up times from stop mode. External crystal
applications should use the full stop recovery time, that is, with SSREC
cleared.
9.5.3 SIM Counter and Reset States
External reset has no effect on the SIM counter. See Stop Mode on
page 164 for details. The SIM counter is free-running after all reset
states. See Active Resets from Internal Sources on page 153 for
counter control and internal reset recovery sequences.
9.6 Program Exception Control
Normal, sequential program execution can be changed in three different
ways:
• Interrupts
– Maskable hardware CPU interrupts
– Non-maskable software interrupt instruction (SWI)
•Reset
• Break interrupts
