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8A/S6

Part # 8A/S6
Description Incandescent S Light Lamp
Category LAMP
Availability In Stock
Qty 2
Qty Price
1 + $2.43518
Manufacturer Available Qty
General Electric
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

EEPROM-2 Memory
Technical Data MC68HC908AZ60A — Rev 2.0
124 EEPROM-2 Memory MOTOROLA
7.6.4 EEPROM-2 Timebase Divider Register
The 16-bit EEPROM-2 timebase divider register consists of two 8-bit
registers: EE2DIVH and EE2DIVL. The 11-bit value in this register is
used to configure the timebase divider circuit to obtain the 35 µs
timebase for EEPROM-2 control.
These two read/write registers are respectively loaded with the contents
of the EEPROM-2 timebase divider on-volatile registers (EE2DIVHNVR
and EE2DIVLNVR) after a reset.
Address: $FF7A
Bit 7 6 5 4 3 2 1 Bit 0
Read:
EEDIVSECD
0000
EEDIV10 EEDIV9 EEDIV8
Write:
Reset: Contents of EE2DIVHNVR ($FF70); Bits[6:3] = 0
= Unimplemented
Figure 7-5. EE2DIV Divider High Register (EE2DIVH)
Address: $FF7B
Bit 7 6 5 4 3 2 1 Bit 0
Read:
EEDIV7 EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0
Write:
Reset: Contents of EE2DIVLNVR ($FF71)
Figure 7-6. EE2DIV Divider Low Register (EE2DIVL)
EEPROM-2 Memory
EEPROM-2 Register Descriptions
MC68HC908AZ60A — Rev 2.0 Technical Data
MOTOROLA EEPROM-2 Memory 125
EEDIVSECD — EEPROM-2 Divider Security Disable
This bit enables/disables the security feature of the EE2DIV registers.
When EE2DIV security feature is enabled, the state of the registers
EE2DIVH and EE2DIVL are locked (including EEDIVSECD bit). The
EE2DIVHNVR and EE2DIVLNVR non-volatile memory registers are
also protected from being erased/programmed.
1 = EE2DIV security feature disabled
0 = EE2DIV security feature enabled
EEDIV[10:0] — EEPROM-2 timebase prescaler
These prescaler bits store the value of EE2DIV which is used as the
divisor to derive a timebase of 35µs from the selected reference clock
source (CGMXCLK or bus block in the CONFIG-2 register) for the
EEPROM-2 related internal timer and circuits. EEDIV[10:0] bits are
readable at any time. They are writable when EELAT = 0 and
EEDIVSECD = 1.
The EE2DIV value is calculated by the following formula:
EE2DIV= INT[Reference Frequency(Hz) x 35 x10
-6
+0.5]
Where the result inside the bracket is rounded down to the nearest
integer value
For example, if the reference frequency is 4.9152MHz, the EE2DIV
value is 172
NOTE: Programming/erasing the EEPROM with an improper EE2DIV value
may result in data lost and reduce endurance of the EEPROM device.
EEPROM-2 Memory
Technical Data MC68HC908AZ60A — Rev 2.0
126 EEPROM-2 Memory MOTOROLA
7.6.5 EEPROM-2 Timebase Divider Non-Volatile Register
The 16-bit EEPROM-2 timebase divider non-volatile register consists of
two 8-bit registers: EE2DIVHNVR and EE2DIVLNVR. The contents of
these two registers are respectively loaded into the EEPROM-2
timebase divider registers, EE2DIVH and EE2DIVL, after a reset.
These two registers are erased and programmed in the same way as an
EEPROM-2 byte.
These two registers are protected from erase and program operations if
the EEDIVSECD is set to logic 1 in the EE2DIVH (see ) or programmed
to a logic 1 in the EE2DIVHNVR.
NOTE: Once EEDIVSECD in the EE2DIVHNVR is programmed to 0 and after a
system reset, the EE2DIV security feature is permanently enabled
because the EEDIVSECD bit in the EE2DIVH is always loaded with 0
Address: $FF70
Bit 7 6 5 4 3 2 1 Bit 0
Read:
EEDIVSECD
R R R R EEDIV10 EEDIV9 EEDIV8
Write:
Reset: Unaffected by reset; $FF when blank
R=Reserved
Figure 7-7. EEPROM-2 Divider Non-Volatile Register High
(EE2DIVHNVR))
Address: $FF71
Bit 7 6 5 4 3 2 1 Bit 0
Read:
EEDIV7 EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0
Write:
Reset: Unaffected by reset; $FF when blank
Figure 7-8. EEPROM-2 Divider Non-Volatile Register Low
(EE2DIVLNVR)
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