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8A/S6

Part # 8A/S6
Description Incandescent S Light Lamp
Category LAMP
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1 + $2.43518
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General Electric
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

EEPROM-2 Memory
Technical Data MC68HC908AZ60A — Rev 2.0
112 EEPROM-2 Memory MOTOROLA
7.5 Functional Description
The 512 bytes of EEPROM-2 are located at $0600-$07FF and can be
programmed or erased without an additional external high voltage
supply. The program and erase operations are enabled through the use
of an internal charge pump. For each byte of EEPROM, the write/erase
endurance is 10,000 cycles.
7.5.1 EEPROM-2 Configuration
The 8-bit EEPROM-2 Non-Volatile Register (EE2NVR) and the 16-bit
EEPROM-2 Timebase Divider Non-Volatile Register (EE2DIVNVR)
contain the default settings for the following EEPROM configurations:
EEPROM-2 Timebase Reference
EEPROM-2 Security Option
EEPROM-2 Block Protection
EE2NVR and EE2DIVNVR are non-volatile EEPROM registers. They
are programmed and erased in the same way as EEPROM bytes. The
contents of these registers are loaded into their respective volatile
registers during a MCU reset. The values in these read/write volatile
registers define the EEPROM-2 configurations.
For EE2NVR, the corresponding volatile register is the EEPROM-2
Array Configuration Register (EE2ACR). For the EE2DIVNCR (two 8-bit
registers: EE2DIVHNVR and EE2DIVLNVR), the corresponding volatile
register is the EEPROM-2 Divider Register (EE2DIV: EE2DIVH and EE2
DIVL).
7.5.2 EEPROM-2 Timebase Requirements
A 35µs timebase is required by the EEPROM-2 control circuit for
program and erase of EEPROM content. This timebase is derived from
dividing the CGMXCLK or bus clock (selected by EEDIVCLK bit in
CONFIG-2 Register) using a timebase divider circuit controlled by the
16-bit EEPROM-2 Timebase Divider EE2DIV Register (EE2DIVH and
EE2DIVL).
EEPROM-2 Memory
Functional Description
MC68HC908AZ60A — Rev 2.0 Technical Data
MOTOROLA EEPROM-2 Memory 113
As the CGMXCLK or bus clock is user selected, the EEPROM-2
Timebase Divider Register must be configured with the appropriate
value to obtain the 35 µs. The timebase divider value is calculated by
using the following formula:
EE2DIV= INT[Reference Frequency(Hz) x 35 x10
-6
+0.5]
This value is written to the EEPROM-2 Timebase Divider Register
(EE2DIVH and EE2DIVL) or programmed into the EEPROM-2
Timebase Divider Non-Volatile Register prior to any EEPROM program
or erase operations(see EEPROM-2 Configuration on page 112 and
EEPROM-2 Timebase Requirements on page 112).
7.5.3 EEPROM-2 Program/Erase Protection
The EEPROM has a special feature that designates the 16 bytes of
addresses from $06F0 to $06FF to be permanently secured. This
program/erase protect option is enabled by programming the EEPRTCT
bit in the EEPROM-2 Non-Volatile Register (EE2NVR) to a logic zero.
Once the EEPRTCT bit is programmed to 0 for the first time:
Programming and erasing of secured locations $06F0 to $06FF is
permanently disabled.
Secured locations $06F0 to $06FF can be read as normal.
Programming and erasing of EE2NVR is permanently disabled.
Bulk and Block Erase operations are disabled for the unprotected
locations $0600-$06EF, $0700-$07FF.
Single byte program and erase operations are still available for
locations $0600-$06EF and $0700-$07FF for all bytes that are not
protected by the EEPROM-2 Block Protect EEBPx bits (see
EEPROM-2 Block Protection on page 114 and EEPROM-2
Array Configuration Register on page 121)
NOTE: Once armed, the protect option is permanently enabled. As a
consequence, all functions in the EE2NVR will remain in the state they
were in immediately before the security was enabled.
EEPROM-2 Memory
Technical Data MC68HC908AZ60A — Rev 2.0
114 EEPROM-2 Memory MOTOROLA
7.5.4 EEPROM-2 Block Protection
The 512 bytes of EEPROM-2 are divided into four 128-byte blocks. Each
of these blocks can be protected from erase/program operations by
setting the EEBPx bit in the EE2NVR. Table 7-1 shows the address
ranges for the blocks.
These bits are effective after a reset or a upon read of the EE2NVR
register. The block protect configuration can be modified by
erasing/programming the corresponding bits in the EE2NVR register
and then reading the EE2NVR register. Please see EEPROM-2 Array
Configuration Register on page 121 for more information.
NOTE: Once EEDIVSECD in the EE2DIVHNVR is programmed to 0 and after a
system reset, the EE2DIV security feature is permanently enabled
because the EEDIVSECD bit in the EE2DIVH is always loaded with 0
thereafter. Once this security feature is armed, erase and program mode
are disabled for EE2DIVHNVR and EE2DIVLNVR. Modifications to the
EE2DIVH and EE2DIVL registers are also disabled. Therefore, be
cautious on programming a value into the EE2DIVHNVR.
7.5.5 EEPROM-2 Programming and Erasing
The unprogrammed or erase state of an EEPROM bit is a logic 1. The
factory default for all bytes within the EEPROM-2 array is $FF.
The programming operation changes an EEPROM bit from logic 1 to
logic 0 (programming cannot change a bit from logic 0 to a logic 1). In a
single programming operation, the minimum EEPROM programming
size is one bit; the maximum is eight bits (one byte).
Table 7-1. EEPROM-2 Array Address Blocks
Block Number (EEBPx) Address Range
EEBP0 $0600–$067F
EEBP1 $0680–$06FF
EEBP2 $0700–$077F
EEBP3 $0780–$07FF
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