EEPROM-1 Memory
Technical Data MC68HC908AZ60A — Rev 2.0
100 EEPROM-1 Memory MOTOROLA
EELAT — EEPROM-1 Latch Control
This read/write bit latches the address and data buses for
programming the EEPROM-1 array. EELAT cannot be cleared if
EEPGM is still set. Reset clears this bit.
1 = Buses configured for EEPROM-1 programming or erase
operation
0 = Buses configured for normal operation
AUTO — Automatic termination of program/erase cycle
When AUTO is set, EEPGM is cleared automatically after the
program/erase cycle is terminated by the internal timer.
(See note D for EEPROM-1 Programming on page 96, EEPROM-1
Erasing on page 97 and EEPROM Memory Characteristics on
page 542)
1 = Automatic clear of EEPGM is enabled
0 = Automatic clear of EEPGM is disabled
EEPGM — EEPROM-1 Program/Erase Enable
This read/write bit enables the internal charge pump and applies the
programming/erasing voltage to the EEPROM-1 array if the EELAT
bit is set and a write to a valid EEPROM-1 location has occurred.
Reset clears the EEPGM bit.
1 = EEPROM-1 programming/erasing power switched on
0 = EEPROM-1 programming/erasing power switched off
NOTE: Writing logic 0s to both the EELAT and EEPGM bits with a single
instruction will clear EEPGM only to allow time for the removal of high
voltage.
