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8A/S6

Part # 8A/S6
Description Incandescent S Light Lamp
Category LAMP
Availability In Stock
Qty 2
Qty Price
1 + $2.43518
Manufacturer Available Qty
General Electric
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

EEPROM-1 Memory
Functional Description
MC68HC908AZ60A — Rev 2.0 Technical Data
MOTOROLA EEPROM-1 Memory 97
B. If more than one valid EEPROM write occurs, the last address and
data will be latched overriding the previous address and data. Once data
is written to the desired address, do not read EEPROM-1 locations other
than the written location. (Reading an EEPROM location returns the
latched data and causes the read address to be latched).
C. The EEPGM bit cannot be set if the EELAT bit is cleared or a non-
valid EEPROM address is latched. This is to ensure proper
programming sequence. Once EEPGM is set, do not read any
EEPROM-1 locations; otherwise, the current program cycle will be
unsuccessful. When EEPGM is set, the on-board programming
sequence will be activated.
D. The delay time for the EEPGM bit to be cleared in AUTO mode is less
than t
EEPGM
. However, on other MCUs, this delay time may be different.
For forward compatibility, software should not make any dependency on
this delay time.
E. Any attempt to clear both EEPGM and EELAT bits with a single
instruction will only clear EEPGM. This is to allow time for removal of
high voltage from the EEPROM-1 array.
EEPROM-1 Erasing The programmed state of an EEPROM bit is logic 0. Erasing changes
the state to a logic 1. Only EEPROM-1 bytes in the non-protected blocks
and the EE1NVR register can be erased.
Use the following procedure to erase a byte, block or the entire
EEPROM-1 array:
1. Configure EERAS1 and EERAS0 for byte, block or bulk erase; set
EELAT in EE1CR.
(A)
NOTE: If using the AUTO mode, also set the AUTO bit in Step 1.
2. Byte erase: write any data to the desired address.
(B)
Block erase: write any data to an address within the desired
block.
(B)
Bulk erase: write any data to an address within the array.
(B)
3. Set the EEPGM bit.
(C)
Go to Step 7 if AUTO is set.
EEPROM-1 Memory
Technical Data MC68HC908AZ60A — Rev 2.0
98 EEPROM-1 Memory MOTOROLA
4. Wait for a time: t
EEBYTE
for byte erase; t
EEBLOCK
for block erase;
t
EEBULK.
for bulk erase.
5. Clear EEPGM bit.
6. Wait for a time, t
EEFPV
, for the erasing voltage to fall. Go to Step 8.
7. Poll the EEPGM bit until it is cleared by the internal timer.
(D)
8. Clear EELAT bits.
(E)
NOTE: A. Setting the EELAT bit configures the address and data buses to latch
data for erasing the array. Only valid EEPROM-1 addresses will be
latched. If EELAT is set, other writes to the EE1CR will be allowed after
a valid EEPROM-1 write.
B. If more than one valid EEPROM write occurs, the last address and
data will be latched overriding the previous address and data. Once data
is written to the desired address, do not read EEPROM-1 locations other
than the written location. (Reading an EEPROM location returns the
latched data and causes the read address to be latched).
C. The EEPGM bit cannot be set if the EELAT bit is cleared or a non-
valid EEPROM address is latched. This is to ensure proper
programming sequence. Once EEPGM is set, do not read any
EEPROM-1 locations; otherwise, the current program cycle will be
unsuccessful. When EEPGM is set, the on-board programming
sequence will be activated.
D. The delay time for the EEPGM bit to be cleared in AUTO mode is less
than t
EEBYTE
/t
EEBLOCK
/t
EEBULK
. However, on other MCUs, this delay
time may be different. For forward compatibility, software should not
make any dependency on this delay time.
E. Any attempt to clear both EEPGM and EELAT bits with a single
instruction will only clear EEPGM. This is to allow time for removal of
high voltage from the EEPROM-1 array.
EEPROM-1 Memory
EEPROM-1 Register Descriptions
MC68HC908AZ60A — Rev 2.0 Technical Data
MOTOROLA EEPROM-1 Memory 99
6.6 EEPROM-1 Register Descriptions
Four I/O registers and three non-volatile registers control program, erase
and options of the EEPROM-1 array.
6.6.1 EEPROM-1 Control Register
This read/write register controls programming/erasing of the array.
Bit 7— Unused bit
This read/write bit is software programmable but has no functionality.
EEOFF — EEPROM-1 power down
This read/write bit disables the EEPROM-1 module for lower power
consumption. Any attempts to access the array will give unpredictable
results. Reset clears this bit.
1 = Disable EEPROM-1 array
0 = Enable EEPROM-1 array
EERAS1 and EERAS0 — Erase/Program Mode Select Bits
These read/write bits set the erase modes. Reset clears these bits.
Address: $FE1D
Bit 7654321Bit 0
Read:
UNUSED
0
EEOFF EERAS1 EERAS0 EELAT AUTO EEPGM
Write:
Reset:00000000
= Unimplemented
Figure 6-2. EEPROM-1 Control Register (EE1CR)
Table 6-3. EEPROM-1 Program/Erase Mode Select
EEBPx EERAS1 EERAS0 MODE
000Byte Program
001Byte Erase
010Block Erase
0 1 1 Bulk Erase
1 X X No Erase/Program
X = don’t care
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