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8A/S6

Part # 8A/S6
Description Incandescent S Light Lamp
Category LAMP
Availability In Stock
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1 + $2.43518
Manufacturer Available Qty
General Electric
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

FLASH-2 Memory
Technical Data MC68HC908AZ60A — Rev 2.0
82 FLASH-2 Memory MOTOROLA
Decreasing the value in FL2BPR by one increases the protected range
by one page (128 bytes). However, programming the block protect
register with $FE protects a range twice that size, 256 bytes, in the
corresponding array. $FE means that locations $7F00–$7FFF are
protected in FLASH-2.
The FLASH memory does not exist at some locations. The block
protection range configuration is unaffected if FLASH memory does not
exist in that range. Refer to the memory map and make sure that the
desired locations are protected.
5.5 FLASH-2 Block Protection
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made for protecting
blocks of memory from unintentional erase or program operations due to
system malfunction. This protection is done by using the FLASH-2 Block
Protection Register (FL2BPR). FL2BPR determines the range of the
FLASH-2 memory which is to be protected. The range of the protected
area starts from a location defined by FL2BPR and ends at the bottom
of the FLASH-2 memory ($7FFF). When the memory is protected, the
HVEN bit can not be set in either ERASE or PROGRAM operations.
NOTE: In performing a program or erase operation, the FLASH-2 Block Protect
Register must be read after setting the PGM or ERASE bit and before
asserting the HVEN bit.
When the FLASH-2 Block Protect Register is programmed with all 0’s,
the entire memory is protected from being programmed and erased.
When all the bits are erased (all 1’s), the entire memory is accessible for
program and erase.
When bits within FL2BPR are programmed (logic 0), they lock a block of
memory address ranges as shown in FLASH-2 Block Protect Register
on page 80. If FL2BPR is programmed with any value other than $FF,
the protected block of FLASH memory can not be erased or
programmed.
FLASH-2 Memory
FLASH-2 Mass Erase Operation
MC68HC908AZ60A — Rev 2.0 Technical Data
MOTOROLA FLASH-2 Memory 83
NOTE: The vector locations and the FLASH Block Protect Registers are located
in the same page. FL1BPR and FL2BPR are not protected with special
hardware or software; therefore, if this page is not protected by FL1BPR
and the vector locations are erased by either a page or a mass erase
operation, both FL1BPR and FL2BPR will also get erased.
5.6 FLASH-2 Mass Erase Operation
Use this step-by-step procedure to erase the entire FLASH-2 memory to
read as logic 1:
1. Set both the ERASE bit and the MASS bit in the FLASH-2 Control
Register (FL2CR).
2. Read the FLASH-2 Block Protect Register (FL2BPR).
3. Write to any FLASH-2 address within the FLASH-2 array with any
data.
NOTE: If the address written to in Step 3 is within address space protected by
the FLASH-2 Block Protect Register (FL2BPR), no erase will occur.
4. Wait for a time, t
NVS
.
5. Set the HVEN bit.
6. Wait for a time, t
MERASE
.
7. Clear the ERASE bit.
8. Wait for a time, t
NVHL
.
9. Clear the HVEN bit.
10. Wait for a time, t
RCV
, after which the memory can be accessed in
normal read mode.
NOTE: A. Programming and erasing of FLASH locations can not be performed
by code being executed from the same FLASH array.
B. While these operations must be performed in the order shown, other
unrelated operations may occur between the steps. Care must be taken
however to ensure that these operations do not access any address
FLASH-2 Memory
Technical Data MC68HC908AZ60A — Rev 2.0
84 FLASH-2 Memory MOTOROLA
within the FLASH array memory space such as the COP Control
Register (COPCTL) at $FFFF.
C. It is highly recommended that interrupts be disabled during
program/erase operations.
5.7 FLASH-2 Page Erase Operation
Use this step-by-step procedure to erase a page (128 bytes) of FLASH-
2 memory to read as logic 1:
1. Set the ERASE bit and clear the MASS bit in the FLASH-2 Control
Register (FL2CR).
2. Read the FLASH-2 Block Protect Register (FL2BPR).
3. Write any data to any FLASH-2 address within the address range
of the page (128 byte block) to be erased.
4. Wait for time, t
NVS
.
5. Set the HVEN bit.
6. Wait for time, t
ERASE
.
7. Clear the ERASE bit.
8. Wait for time, t
NVH
.
9. Clear the HVEN bit.
10. Wait for a time, t
RCV
, after which the memory can be accessed in
normal read mode.
NOTE: A. Programming and erasing of FLASH locations can not be performed
by code being executed from the same FLASH array.
B. While these operations must be performed in the order shown, other
unrelated operations may occur between the steps. Care must be taken
however to ensure that these operations do not access any address
within the FLASH array memory space such as the COP Control
Register (COPCTL) at $FFFF.
C. It is highly recommended that interrupts be disabled during
program/erase operations.
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