FLASH-2 Memory
Technical Data MC68HC908AZ60A — Rev 2.0
78 FLASH-2 Memory MOTOROLA
5.3 Functional Description
The FLASH-2 memory is a non-continuos array consisting of a total of
29,616 bytes on the MC68HC908AS60A and 29,488 bytes on the
MC68HC908AZ60A. An erased bit reads as a logic 1 and a programmed
bit reads as a logic 0.
Memory in the FLASH-2 array is organized into rows within pages. There
are two rows of memory per page with 64 bytes per row. The minimum
erase block size is a single page,128 bytes. Programming is performed
on a per-row basis, 64 bytes at a time. Program and erase operations
are facilitated through control bits in the FLASH-2 Control Register
(FL2CR). Details for these operations appear later in this section.
The FLASH-2 memory map consists of:
• $0450–$05FF: User Memory on MC68HC908AS60A (432 bytes)
• $0450–$04FF: User Memory on MC68HC908AZ60A (176 bytes)
• $0580–$05FF: User Memory on MC68HC908AZ60A (128 bytes)
• $0E00–$7FFF: User Memory (29,616 bytes)
• $FF81: FLASH-2 Block Protect Register (FL2BPR)
– Note that FL2BPR physically resides within FLASH-1 memory
addressing space
• $FE08: FLASH-2 Control Register (FL2CR)
Programming tools are available from Motorola. Contact your local
Motorola representative for more information.
NOTE: A security feature prevents viewing of the FLASH contents.
(1)
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
