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8A/S6

Part # 8A/S6
Description Incandescent S Light Lamp
Category LAMP
Availability In Stock
Qty 2
Qty Price
1 + $2.43518
Manufacturer Available Qty
General Electric
  • Shipping Freelance Stock: 2
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Memory Map
Technical Data MC68HC908AZ60A — Rev 2.0
58 Memory Map MOTOROLA
All registers are shown for both MC68HC908AS60A and
MC68HC908AZ60A. Refer to individual module sections to determine if
the module is available and the register active or not.
2.4 Additional Status and Control Registers
Selected addresses in the range $FE00 to $FFCB contain additional
Status and Control registers as shown inFigure 2-3. A noted exception
is the COP Control Register (COPCTL) at address $FFFF.
$0045
Timer B CH0 Status and Control
Register (TBSC0)
Read: CH0F
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
Write: 0
$0046
Timer B CH0 Register High
(TBCH0H)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
$0047
Timer B CH0 Register Low
(TBCH0L)
Read:
Bit 7654321Bit 0
Write:
Timer B CH1 Status and Control
Register (TBSC1)
Read: CH1F
CH1IE
0
MS1A ELS1B ELS1A TOV1 CH1MAX
$0048 Write: 0 R
$0049
Timer B CH1 Register High
(TBCH1H)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
$004A
Timer B CH1 Register Low
(TBCH1L)
Read:
Bit 7654321Bit 0
Write:
$004B
PIT Status and Control Register
(PSC)
Read: POF
POIE PSTOP
00
PPS2 PPS1 PPS0
Write: 0 PRST
$004C
PIT Counter Register High
(PCNTH)
Read: Bit 15 14 13 12 11 10 9 Bit 8
Write:
$004D
PIT Counter Register Low
(PCNTL)
Read: Bit 7 654321Bit 0
Write:
$004E
PIT Modulo Register High
(PMODH)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
$004F
PIT Modulo Register Low
(PMODL)
Read:
Bit 7654321Bit 0
Write:
= Unimplemented R = Reserved
Addr.Register Name Bit 7654321Bit 0
Figure 2-2. I/O Data, Status and Control Registers (Sheet 5 of 5)
Memory Map
Additional Status and Control Registers
MC68HC908AZ60A — Rev 2.0 Technical Data
MOTOROLA Memory Map 59
Addr.Register Name Bit 7654321Bit 0
$FE00
SIM Break Status Register
(SBSR)
Read:
RRRRRR
BW
R
Write: 0
$FE01 SIM Reset Status Register (SRSR)
Read: POR PIN COP ILOP ILAD 0 LVI 0
Write:
$FE03
SIM Break Flag Control Register
(SBFCR)
Read:
BCFERRRRRRR
Write:
$FE08
FLASH-2 Control Register
(FL2CR)
Read:
Write:
0000
HVEN VERF ERASE PGM
$FE09
Configuration Write-Once Register
(CONFIG-2)
Read:
EEDIVCLK
RR
MSCAN
D
AT60A
RRAZxx
Write: R
$FE0C
Break Address Register High
(BRKH)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
$FE0D
Break Address Register Low
(BRKL)
Read:
Bit 7654321Bit 0
Write:
$FE0E
Break Status and Control
Register (BRKSCR)
Read:
BRKE BRKA
000000
Write:
$FE0F LVI Status Register (LVISR)
Read: LVIOUT 0000000
Write:
$FE10
EE1DIV Hi Non-volatile Register
(EE1DIVHNVR)
Read:
Write:
EEDIVSECD
RRRR
EEDIV1
0
EEDIV9 EEDIV8
$FE11 EE1DIV Lo Non-volatile Register
Read:
Write:
EEDIV7 EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0
(EE1DIVLNVR)
$FE1A EE1DIV Divider High Register
Read:
Write:
EEDIVSECD
0000
EEDIV1
0
EEDIV9 EEDIV8
(EE1DIVH)
$FE1B EE1DIV Divider Low Register
Read:
Write:
EEDIV7 EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0
(EE1DIVL)
$FE1C
EEPROM-1 Nonvolatile Register
(EE1NVR)
Read:
UNUSE
D
UNUSE
D
UNUSE
D
EEPRTC
T
EEBP3 EEBP2 EEBP1 EEBP0
Write:
$FE1D
EEPROM-1 Control Register
(EE1CR)
Read:
UNUSE
D
0
EEOFF EERAS1 EERAS0 EELAT AUTO EEPGM
Write:
$FE1F
EEPROM-1 Array Configuration
Register (EE1ACR)
Read:
UNUSE
D
UNUSE
D
UNUSE
D
EEPRTC
T
EEBP3 EEBP2 EEBP1 EEBP0
Write:
$FF70
EE2DIV Hi Non-volatile Register
(EE2DIVHNVR)
Read:
EEDIVSECD
RRRR
EEDIV1
0
EEDIV9 EEDIV8
Figure 2-3. Additional Status and Control Registers (Sheet 1 of 2)
Memory Map
Technical Data MC68HC908AZ60A — Rev 2.0
60 Memory Map MOTOROLA
$FF71 EE2DIV Lo Non-volatile Register Read:
EEDIV7 EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0
(EE2DIVLNVR)
$FF7A EE2DIV Divider High Register Read:
EEDIVSECD
0000
EEDIV1
0
EEDIV9 EEDIV8
(EE2DIVH)
$FF7B EE2DIV Divider Low Register Read:
EEDIV7 EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0
(EE2DIVL)
$FE7C
EEPROM-2 Nonvolatile Register
(EE2NVR)
Read:
UNUSE
D
UNUSE
D
UNUSE
D
EEPRTC
T
EEBP3 EEBP2 EEBP1 EEBP0
Write:
$FE7D
EEPROM-2 Control Register
(EE2CR)
Read:
UNUSE
D
0
EEOFF EERAS1 EERAS0 EELAT AUTO EEPGM
Write:
$FE7F
EEPROM-2 Array Configuration
Register (EE2ACR)
Read:
UNUSE
D
UNUSE
D
UNUSE
D
EEPRTC
T
EEBP3 EEBP2 EEBP1 EEBP0
Write:
$FF80
FLASH-1 Block Protect Register
(FL1BPR)
Read:
BPR7 BPR6 BPR5 BPR4 BPR3 BPR2 BPR1 BPR0
Write:
$FF81
FLASH-2 Block Protect Register
(FL2BPR)
Read:
BPR7 BPR6 BPR5 BPR4 BPR3 BPR2 BPR1 BPR0
Write:
$FF88
FLASH-1 Control Register
(FL1CR)
Read: 0000
HVEN VERF ERASE PGM
Write:
$FFFF COP Control Register (COPCTL)
Read: LOW BYTE OF RESET VECTOR
Write: WRITING TO $FFFF CLEARS COP COUNTER
= Unimplemented R = Reserved
Addr.Register Name Bit 7654321Bit 0
Figure 2-3. Additional Status and Control Registers (Sheet 2 of 2)
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