Fairchild Semiconductor 100351QC

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Item Description: Flip Flop D-Master-Slave TypePos-Edge 1-Element 28-Pin PL

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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

© 2000 Fairchild Semiconductor Corporation DS009885 www.fairchildsemi.com
July 1988
Revised August 2000
100351 Low Power Hex D-Type Flip-Flop
100351
Low Power Hex D-Type Flip-Flop
General Description
The 100351 contains six D-type edge-triggered, master/
slave flip-flops with true and complement outputs, a pair of
common Clock inputs (CP
a
and CP
b
) and common Master
Reset (MR) input. Data enters a master when both CP
a
and CP
b
are LOW and transfers to the slave when CP
a
and
CP
b
(or both) go HIGH. The MR input overrides all other
inputs and makes the Q outputs LOW. All inputs have
50 k
pull-down resistors.
Features
40% power reduction of the 100151
2000V ESD protection
Pin/function compatible with 100151
Voltage compensated operating range:
4.2V to 5.7V
Available to industrial grade temperature range
Ordering Code:
Devises also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagrams
24-Pin DIP/SOIC
28-Pin PLCC
Order Number Package Number Package Description
100351SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
100351PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100351QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100351QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
40°C to +85°C)
Pin Names Description
D
0
D
5
Data Inputs
CP
a
, CP
b
Common Clock Inputs
MR Asynchronous Master Reset Input
Q
0
Q
5
Data Outputs
Q
0
Q
5
Complementary Data Outputs
www.fairchildsemi.com 2
100351
Truth Tables
(Each Flip-flop)
Synchronous Operation
H = HIGH Voltage Level
L = LOW Voltage Level
X = Dont Care
t = Time before CP positive transition
t+1 = Time after CP positive transition
= LOW-to-HIGH transition
Asynchronous Operation
Logic Diagram
Inputs Outputs
D
n
CP
a
CP
b
MR Q
n
(t+1)
L
LL L
H
LL H
LL
LL
HL
LH
XH
LQ
n
(t)
X
HL Q
n
(t)
XL LL Q
n
(t)
Inputs Outputs
D
n
CP
a
CP
b
MR Q
n
(t+1)
XX XH L
3 www.fairchildsemi.com
100351
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The Recommended Operating Conditions table will define the conditions
for actual device operation.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version
DC Electrical Characteristics
(Note 3)
V
EE
= 4.2V to 5.7V, V
CC
= V
CCA
= GND, T
C
= 0°C to +85°C
Note 3: The specified limits represent the worst case value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under worst case conditions.
DIP AC Electrical Characteristics
V
EE
= 4.2V to 5.7V, V
CC
= V
CCA
= GND
Storage Temperature (T
STG
) 65°C to +150°C
Maximum Junction Temperature (T
J
) +150°C
V
EE
Pin Potential to Ground Pin 7.0V to +0.5V
Input Voltage (DC) V
EE
to +0.5V
Output Current (DC Output HIGH)
50 mA
ESD (Note 2)
2000V
Case Temperature (T
C
)
Commercial 0
°C to +85°C
Industrial
40°C to +85°C
Supply Voltage (V
EE
) 5.7V to 4.2V
Symbol Parameter Min Typ Max Units Conditions
V
OH
Output HIGH Voltage 1025 955 870
mV
V
IN
=V
IH
(Max) Loading with
V
OL
Output LOW Voltage 1830 1705 1620 or V
IL
(Min) 50 to 2.0V
V
OHC
Output HIGH Voltage 1035
mV
V
IN
= V
IH
(Min) Loading with
V
OLC
Output LOW Voltage 1610 or V
IL
(Max) 50 to 2.0V
V
IH
Input HIGH Voltage 1165 870 mV Guaranteed HIGH Signal for All Inputs
V
IL
Input LOW Voltage 1830 1475 mV Guaranteed LOW Signal for All Inputs
I
IL
Input LOW Current 0.50 µAV
IN
= V
IL
(Min)
I
IH
Input HIGH Current
MR 350
D
0
D
5
240 µAV
IN
= V
IH
(Max)
CP
a
, CP
b
350
I
EE
Power Supply Current 129 62 mA Inputs OPEN
Symbol Parameter
T
C
= 0°CT
C
= +25°CT
C
= +85°C
Units Conditions
Min Max Min Max Min Max
f
MAX
Toggle Frequency 375 375 375 MHz Figures 2, 3
t
PLH
Propagation Delay
0.80 2.00 0.80 2.0 0.90 2.10 ns Figures 1, 3
t
PHL
CP
a
, CP
b
to Output
t
PLH
Propagation Delay
1.10 2.30 1.10 2.30 1.20 2.40 ns Figures 1, 4
t
PHL
MR to Output
t
TLH
Transition Time
0.35 1.20 0.35 1.20 0.35 1.20 ns Figures 1, 3
t
THL
20% to 80%, 80% to 20%
t
S
Setup Time
D
0
D
5
0.40 0.40 0.40 ns Figure 5
MR (Release Time) 1.60 1.60 1.60 Figure 4
t
H
Hold Time
0.80 0.80 0.80 ns Figure 5
D
0
D
5
t
PW
(H) Pulse Width HIGH
2.00 2.00 2.00 ns Figures 3, 4
CP
a
, CP
b
, MR
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