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5962-8871902MXA

Part # 5962-8871902MXA
Description DAC 4-CH R-2R 12-BIT 28CDIP -Rail/Tube
Category IC
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Analog Devices
Date Code: 9640
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

PIN CONFIGURATIONS
44-Pin Package
28-Pin DIP Package
REV.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
Monolithic
12-Bit Quad DAC
AD664
FEATURES
Four Complete Voltage Output DACs
Data Register Readback Feature
“Reset to Zero” Override
Multiplying Operation
Double-Buffered Latches
Surface Mount and DIP Packages
MIL-STD-883 Compliant Versions Available
APPLICATIONS
Automatic Test Equipment
Robotics
Process Control
Disk Drives
Instrumentation
Avionics
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: Fax:
PRODUCT DESCRIPTION
The AD664 is four complete 12-bit, voltage-output DACs on
one monolithic IC chip. Each DAC has a double-buffered input
latch structure and a data readback function. All DAC read and
write operations occur through a single microprocessor-compatible
I/O port.
The I/O port accommodates 4-, 8- or 12-bit parallel words al-
lowing simple interfacing with a wide variety of microprocessors.
A reset to zero control pin is provided to allow a user to simulta-
neously reset all DAC outputs to zero, regardless of the contents
of the input latch. Any one or all of the DACs may be placed in
a transparent mode allowing immediate response by the outputs
to the input data.
The analog portion of the AD664 consists of four DAC cells,
four output amplifiers, a control amplifier and switches. Each
DAC cell is an inverting R-2R type. The output current from
each DAC is switched to the on-board application resistors and
output amplifier. The output range of each DAC cell is pro-
grammed through the digital I/O port and may be set to unipo-
lar or bipolar range, with a gain of one or two times the reference
voltage. All DACs are operated from a single external reference.
The functional completeness of the AD664 results from the
combination of Analog Devices’ BiMOS II process, laser-trimmed
thin-film resistors and double-level metal interconnects.
PRODUCT HIGHLIGHTS
1. The AD664 provides four voltage-output DACs on one chip
offering the highest density 12-bit D/A function available.
2. The output range of each DAC is fully and independently
programmable.
3. Readback capability allows verification of contents of the in-
ternal data registers.
4. The asynchronous RESET control returns all D/A outputs
to zero volts.
5. DAC-to-DAC matching performance is specified and tested.
6. Linearity error is specified to be 1/2 LSB at room tempera-
ture and 3/4 LSB maximum for the K, B and T grades.
7. DAC performance is guaranteed to be monotonic over the
full operating temperature range.
8. Readback buffers have tristate outputs.
9. Multiplying-mode operation allows use with fixed or vari-
able, positive or negative external references.
10. The AD664 is available in versions compliant with MIL-
STD-883. Refer to the Analog Devices Military Products
Databook or current AD664/883B data sheet for detailed
specifications.
781/329-4700
781/461-3113
D
AD664–SPECIFICATIONS
(V
LL
= +5 V, V
CC
= +15 V, V
EE
= –15 V, V
REF
= +10 V, T
A
= +258C
unless otherwise noted)
REV.
–2–
Model JN/JP/AD/AJ/SD KN/KP/BD/BJ/BE/TD/TE
Min Typ Max Min Typ Max Units
RESOLUTION 12 12 * * Bits
ANALOG OUTPUT
Voltage Range
1
UNI Versions 0 V
CC
– 2.0
2
* * Volts
BIP Versions V
EE
+ 2.0
2
V
CC
– 2.0
2
* * Volts
Output Current 5 * mA
Load Resistance 2 * k
Load Capacitance 500 * pF
Short-Circuit Current 25 40 * * mA
ACCURACY
Gain Error –7 ±3 7–5±25LSB
Unipolar Offset –2 ±1/2 2–1±1/4 1 LSB
Bipolar Zero
3
–3 ±3/4 3–2±1/2 2 LSB
Linearity Error
4
–3/4 ±1/2 3/4 –1/2 ±1/4 1/2 LSB
Linearity T
MIN
to T
MAX
–1 ±3/4 1 –3/4 ±1/2 3/4 LSB
Differential Linearity –3/4 3/4 –1/2 1/2 LSB
Differential Linearity T
MIN
to T
MAX
Monotonic @ All Temperatures Monotonic @ All Temperatures
Gain Error Drift
Unipolar 0 V to +10 V Mode –12 ±7 12 –10 ±5 10 ppm of FSR
5
/°C
Bipolar –5 V to +5 V Mode –12 ±7 12 –10 ± 5 10 ppm of FSR/°C
Bipolar –10 V to +10 V Mode –12 ±7 12 –10 ±5 10 ppm of FSR/°C
Unipolar Offset Drift
Unipolar 0 V to +10 V Mode –3 ±l.5 3–2±l2ppm of FSR/°C
Bipolar Zero Drift
Bipolar –5 V to +5 V Mode –12 ±7 12 –10 ± 5 10 ppm of FSR/°C
Bipolar –10 V to +10 V Mode –12 ±7 12 –10 ±5 10 ppm of FSR/°C
REFERENCE INPUT
Input Resistance 1.3 2. 6 * * k
Voltage Range
6
V
EE
+ 2.0
2
V
CC
– 2.0
2
* * Volts
POWER REOUIREMENTS
V
LL
4.5 5.0 5.5 * * * Volts
I
LL
@ V
IH
, V
IL
= 5 V, 0 V 0.1 1 **mA
@ V
IH
, V
IL
= 2.4 V, 0.4 V 3 6 **mA
V
CC
/V
EE
611.4 616.5 * * Volts
I
CC
12 15 **mA
I
EE
15 19 **mA
Total Power 400 525 * * mW
ANALOG GROUND CURRENT
7
–600 ±400 +600 * * * µA
MATCHING PERFORMANCE
Gain
8
–6 ±3 6–4±24LSB
Offset
9
–2 ±1/2 2–1±1/4 1 LSB
Bipolar Zero
10
–3 ±1 3–2±12LSB
Linearity
11
–1.5 ±1/2 1.5 –1 ±1/2 1 LSB
CROSSTALK
Analog –90 * dB
Digital –60 * dB
DYNAMIC PERFORMANCE (R
L
= 2 k, C
L
= 500 pF)
Settling Time to ±1/2 LSB
OffBitsOn, GAIN = 1, V
REF
= 10 8 10 * * µs
Settling Time to ±1/2 LSB
–10V
REF
10 V, GAIN = 1, Bits On 10 * µs
Glitch Impulse 500 * nV-sec
MULTIPLYING MODE PERFORMANCE
Reference Feedthrough @ 1 kHz –75 * dB
Reference –3 dB Bandwidth 70 * kHz
POWER SUPPLY GAIN SENSITIVITY
11.4 VV
CC
16.5 V ±2 65 * * ppm/%
–16.5 VV
EE
–11.4 V ±2 65 * * ppm/%
4.5 VV
LL
5.5 V ±2 65 * * ppm/%
D
AD664
Model JN/JP/AD/AJ/SD KN/KP/BD/BJ/BE/TD/TE
Min Typ Max Min Typ Max Units
DIGITAL INPUTS
V
IH
2.0 * Volts
V
IL
0 0.8 * * Volts
Data Inputs
I
IH
@ V
IN
= V
LL
–10 ±1 10 ** *µA
I
IL
@ V
IN
= DGND –10 ±1 10 ** *µA
CS/DS0/DS1/RST/RD/LS
I
IH
@ V
IN
= V
LL
–10 ±1 10 ** *µA
I
IL
@ V
IN
= V
LL
–10 ±1 10 ** *µA
MS/TR
12
I
IH
@ V
IN
= V
LL
–10 5 10 ** *µA
I
IL
@ V
IN
= DGND –10 –5 0 ** *µA
QS0/QSl/QS2
l2
I
IH
@ V
IN
= V
LL
–10 5 10 ** *µA
I
IL
@ V
IN
= DGND –10 ±1 10 ** *µA
DIGITAL OUTPUTS
V
OL
@ 1.6 mA Sink 0.4 * Volts
V
OH
@ 0.5 mA Source 2.4 * Volts
TEMPERATURE RANGE
JN/JP/KN/KP 0 +70 **°C
AD/AJ/BD/BJ/BE 40 +85 **°C
SD/TD/TE –55 +125 **°C
NOTES
1
A minimum power supply of ±12.0 V is required for 0 V to +10 V and ±10 V operation. A minimum power supply of ±11.4 V is required for –5 V to +5 V operation.
2
For V
CC
< +12 V and V
EE
> –12 V. Voltage not to exeeed 10 V maximum.
3
Bipolar zero error is the difference from the ideal output (0 volts) and the actual output voltage with code 100 000 000 000 applied to the inputs.
4
Linearity error is defined as the maximum deviation of the actual DAC output from the ideal output (a straight line drawn from 0 to F.S. – 1 LSB).
5
FSR means Full-Scale Range and is 20 V for ±10 V range and 10 V for ± 5 V range.
6
A minimum power supply of ±12.0 V is required for a 10 V reference voltage.
7
Analog Ground Current is input code dependent.
8
Gain error matching is the largest difference in gain error between any two DACs in one package.
9
Offset error matching is the largest difference in offset error between any two DACs in one package.
10
Bipolar zero error matching is the largest difference in bipolar zero error between any two DACs in one package.
11
Linearity error matching is the difference in the worst ease linearity error between any two DACs in one package.
12
44-pin versions only.
*Specifications same as JN/JP/AD/AJ/SD.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
ABSOLUTE MAXIMUM RATINGS*
V
LL
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +7 V
V
CC
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +18 V
V
EE
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V to 0 V
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C, 10 sec
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mW
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . –1 V to +1 V
Reference Input . . . . . . . . . . . . . . . . . . V
REF
±10 V and V
REF
(V
CC
– 2 V, V
EE
+ 2 V)
V
CC
to V
EE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +36 V
CAUTION
ESD (electrostatic discharge) sensitive device. Unused devices must be stored in conductive foam
or shunts. The protective foam should be discharged to the destination socket before devices are
removed.
WARNING!
ESD SENSITIVE DEVICE
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Outputs . . . . . . . . . . . . . . . . . . . . . Indefinite Shorts to
V
CC,
V
LL
, V
EE
and GND
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
REV.
–3–
D
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