Quad Low Offset, Low Power

Operational Amplifier

Data Sheet

OP400

Rev. H Document Feedback

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FEATURES

Low input offset voltage: 150 µV maximum

Low offset voltage drift over –55°C to +125°C: 1.2 μV/°C

maximum

Low supply current (per amplifier): 725 µA maximum

High open-loop gain: 5000 V/mV minimum

Input bias current: 3 nA maximum

Low noise voltage density: 11 nV/√Hz at 1 kHz

Stable with large capacitive loads: 10 nF typical

Available in die form

FUNCTIONAL BLOCK DIAGRAMS

OUT A

–IN A

+IN A

V+

OUT D

–IN D

+IN D

V–

+IN B

–IN B

OUT B

+IN C

–IN C

OUT C

00304-001

OP400

–

OUTA

–IN A

+IN A

V+

OUT D

–IN D

+IN D

V–

+IN B

–IN B

OUT B

+IN C

–IN C

OUT C

00304-002

OP400

NC = NO CONNECT

–

Figure 1. 14-Pin Ceramic DIP (Y-

Suffix)

and 14-Pin Plastic DIP (P-Suffix)

Figure 2. 16-Pin SOIC (S-Suffix)

GENERAL DESCRIPTION

The OP400 is the first monolithic quad operational amplifier

that features OP77-type performance. Precision performance is

not sacrificed with the OP400 to obtain the space and cost

savings offered by quad amplifiers.

The OP400 features an extremely low input offset voltage of less

than 150 µV with a drift of less than 1.2 µV/°C, guaranteed over

the full military temperature range. Open-loop gain of the

OP400 is more than 5 million into a 10 kΩ load, input bias

current is less than 3 nA, CMR is more than 120 dB, and PSRR

is less than 1.8 µV/V. On-chip Zener zap trimming is used to

achieve the low input offset voltage of the OP400 and eliminates

the need for offset nulling. The OP400 conforms to the industry-

standard quad pinout, which does not have null terminals.

The OP400 features low power consumption, drawing less than

725 µA per amplifier. The total current drawn by this quad

amplifier is less than that of a single OP07, yet the OP400 offers

significant improvements over this industry-standard op amp.

Voltage noise density of the OP400 is a low 11 nV/√Hz at

10 Hz, half that of most competitive devices.

The OP400 is an ideal choice for applications requiring multiple

precision operational amplifiers and where low power

consumption is critical.

VOLTAGE

LIMITING

NETWORK

+IN –IN

V–

OUT

V+

BIAS

00304-003

Figure 3. Simplified Schematic (One of Four Amplifiers Is Shown)

OP400 Data Sheet

Rev. H | Page 2 of 16

TABLE OF CONTENTS

Features .............................................................................................. 1

Functional Block Diagrams ............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Characteristics ............................................................. 3

Absolute Maximum Ratings ............................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution .................................................................................. 5

Typical Performance Characteristics ..............................................6

Applications ..................................................................................... 11

Dual Low Power Instrumentation Amplifier ......................... 11

Bipolar Current Transmitter ..................................................... 12

Differential Output Instrumentation Amplifier .................... 12

Multiple Output Tracking Voltage Reference ......................... 13

Outline Dimensions ....................................................................... 14

Ordering Guide .......................................................................... 15

SMD Parts and Equivalents ...................................................... 15

REVISION HISTORY

1/13—Rev. G to Rev. H

Changes to Features Section and General Description Section ........ 1

Changes to Ordering Guide ........................................................... 15

2/11—Rev. F to Rev. G

Added S Package to Storage Temperature Range in Table 4 ....... 5

Updated Outline Dimensions ....................................................... 15

12/08—Rev. E to Rev. F

Added New Figure 28, Renumbered Sequentially ..................... 10

Updated Outline Dimensions ....................................................... 15

1/07—Rev. D to Rev. E

Updated Format .................................................................. Universal

Changes to Figure 1 and Figure 2 ................................................... 1

Removed Figure 4 ............................................................................. 4

Changes to Table 3 ............................................................................ 4

Changes to Figure 16 through Figure 19, Figure 21 .................... 8

Changes to Figure 27 ........................................................................ 9

Changes to Figure 28 ...................................................................... 10

Changes to Figure 33 ...................................................................... 13

Updated Outline Dimensions ....................................................... 14

3/06—Rev. C to Rev. D

Updated Format .................................................................. Universal

Deleted Wafer Test Limits Table ..................................................... 4

New Package Drawing: R-14 ......................................................... 15

Updated Outline Dimensions ....................................................... 15

Changes to Ordering Guide .......................................................... 16

6/03—Rev. B to Rev. C

Edits to Specifications ....................................................................... 2

10/02—Rev. A to Rev. B

Addition of Absolute Maximum Ratings ....................................... 5

Edits to Outline Dimensions......................................................... 12

4/02—Rev. 0 to Rev. A

Edits to Features................................................................................. 1

Edits to Ordering Information ........................................................ 1

Edits to Pin Connections .................................................................. 1

Edits to General Descriptions ..................................................... 1, 2

Edits to Package Type ....................................................................... 2

Data Sheet OP400

Rev. H | Page 3 of 16

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

@ V

= ±15 V, T

= +25°C, unless otherwise noted.

Table 1.

OP400A/E OP400F OP400G/H

Parameter

Symbol

Conditions

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

INPUT CHARACTERISTICS

Input Offset Voltage

150

230

300

µV

Long-Term Input

Voltage Stability

0.1 0.1 0.1 µV/mo

Input Offset Current I

= 0 V 0.1 1.0 0.1 2.0 0.1 3.5 nA

Input Bias Current I

= 0 V 0.75 3.0 0.75 6.0 0.75 7.0 nA

Input Noise Voltage e

n p-p

0.1 Hz to 10 Hz 0.5 0.5 0.5 µV p-p

Input Resistance

Differential Mode

10 10 10 MΩ

Input Resistance

Common Mode

INCM

200 200 200 GΩ

Large Signal Voltage

Gain

= ±10 V

= 10 kΩ 5000 12,000 3000 7000 3000 7000 V/mV

= 2 kΩ 2000 3500 1500 3000 1500 3000 V/mV

Input Voltage Range

IVR ±12 ±13 ±12 ±13 ±12 ±13 V

Common-Mode

Rejection

CMR V

= 12 V 120 140 115 140 110 135 dB

Input Capacitance

3.2

OUTPUT

CHARACTERISTICS

Output Voltage Swing V

= 10 kΩ ±12 ±12.6 ±12 ±12.6 ±12 ±12.6 V

POWER SUPPLY

Power Supply Rejection

Ratio

PSRR

= 3 V to 18 V

0.1

1.8

0.1

3.2

0.2

5.6

µV/V

Supply Current per

Amplifier

No load 600 725 600 725 600 725 µA

DYNAMIC PERFORMANCE

Slew Rate SR 0.1 0.15 0.1 0.15 0.1 0.15 V/µs

Gain Bandwidth

Product

GBWP A

= 1 500 500 500 kHz

Channel Separation CS V

= 20 V p-p, 123 135 123 135 123 135 dB

= 10 Hz

Capacitive Load

Stability

= 1,

no oscillations

10 10 10 nF

NOISE PERFORMANCE

Input Noise Voltage e

= 10 Hz

22 36 22 36 22 nV/√Hz

Density

= 1000 Hz

11 18 11 18 11 nV/√Hz

Input Noise Current i

n p-p

0.1 Hz to 10 Hz 15 15 15 pA p-p

Input Noise Current

Density

= 10 Hz 0.6 0.6 0.6 pA/√Hz

Guaranteed by CMR test.

Guaranteed but not 100% tested.

Sample tested.

Part #	5962-8777101MCA
Description	QUAD LOW-OFFSET/POWER IC
Category	IC
Availability	Out of Stock
Qty	0

5962-8777101MCA

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