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5962-8773901XA

Part # 5962-8773901XA
Description IC, LOW POWER LOWOFFSET VOLT - Rail/Tube
Category IC
Availability In Stock
Qty 1
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National Semiconductor Corp
Date Code: 0352
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

LM139AQML, LM139QML
www.ti.com
SNOSAH8G FEBRUARY 2005REVISED MARCH 2013
LOW POWER LOW OFFSET VOLTAGE QUAD COMPARATORS
Check for Samples: LM139AQML, LM139QML
1
FEATURES
Compatible with all Forms of Logic
Power Drain Suitable for Battery Operation
2
Available With Radiation Ensured
Total Ionizing Dose 100 krad(Si)
DESCRIPTION
ELDRS Free 100 krad(Si)
The LM139 series consists of four independent
Wide Supply Voltage Range
precision voltage comparators with an offset voltage
LM139/139A Series 2 to 36 V
DC
or ±1 to ±18 V
DC
specification as low as 2 mV max for all four
comparators. These were designed specifically to
Very Low Supply Current Drain (0.8 mA) —
operate from a single power supply over a wide range
Independent of Supply Voltage
of voltages. Operation from split power supplies is
Low Input Biasing Current: 25 nA
also possible and the low power supply current drain
is independent of the magnitude of the power supply
Low Input Offset Current: ±5 nA
voltage. These comparators also have a unique
Offset Voltage: ±1 mV
characteristic in that the input common-mode voltage
Input Common-mode Voltage Range Includes
range includes ground, even though operated from a
GND
single power supply voltage.
Differential Input Voltage Range Equal to the
Application areas include limit comparators, simple
Power Supply Voltage
analog to digital converters; pulse, squarewave and
Low Output Saturation Voltage: 250 mV at 4
time delay generators; wide range VCO; MOS clock
mA
timers; multivibrators and high voltage digital logic
gates. The LM139 series was designed to directly
Output Voltage Compatible with TTL, DTL,
interface with TTL and CMOS. When operated from
ECL, MOS and CMOS Logic Systems
both plus and minus power supplies, they will directly
interface with MOS logic— where the low power drain
ADVANTAGES
of the LM139/LM139A is a distinct advantage over
standard comparators.
High Precision Comparators
Reduced V
OS
Drift Over Temperature
Eliminates Need for Dual Supplies
Allows Sensing Near GND
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
3
OUT1
2
OUT2
1
N/C
20
OUT3
19
OUT4
9 10 11 12 13
IN-2 IN+2 N/C IN-3 IN+3
18 GND
17 N/C
16 IN+4
15 N/C
14 IN-4
V+ 4
N/C 5
IN-1 6
N/C 7
IN+1 8
LM139AQML, LM139QML
SNOSAH8G FEBRUARY 2005REVISED MARCH 2013
www.ti.com
Connection Diagrams
Dual-In-Line Package
See Package Number J(R-GDIP-14)
See Package Number NAD0014B, NAC0014A
See Package Number NAJ002A
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM139AQML LM139QML
LM139AQML, LM139QML
www.ti.com
SNOSAH8G FEBRUARY 2005REVISED MARCH 2013
Absolute Maximum Ratings
(1)
LM139 / LM139A
Supply Voltage, V
+
36 V
DC
or ±18 V
DC
Differential Input Voltage
(2)
36 V
DC
Input Voltage 0.3 V
DC
to +36 V
DC
Input Current (V
IN
< 0.3 V
DC
)
(3)
50 mA
Power Dissipation
(4)(5)
LCCC 1250 mW
CDIP 1200 mW
CLGA (NAD) 680 mW
CLGA (NAC) 680 mW
Sink Current (approx)
(6)
20mA
Output Short-Circuit to GND
(7)
Continuous
Storage Temperature Range -65°C T
A
+150°C
Maximum Junction Temperature (T
J
) +150°C
Lead Temperature (Soldering, 10 seconds) 300°C
Operating Temperature Range -55°C T
A
+125°C
Thermal LCCC (Still Air) 100°C/W
Resistance
LCCC (500LF / Min Air flow) 73°C/W
CDIP (Still Air) 103°C/W
CDIP (500LF / Min Air flow) 65°C/W
θ
JA
CLGA (NAD) (Still Air) 183°C/W
CLGA (NAD) (500LF / Min Air flow) 120°C/W
CLGA (NAC) (Still Air) 183°C/W
CLGA (NAC) (500LF / Min Air flow) 120°C/W
LCCC 28°C/W
CDIP 23°C/W
θ
JC
CLGA (NAD) 23°C/W
CLGA (NAC) 23°C/W
Package Weight LCCC 470mg
(typical)
CDIP 2,190mg
CLGA (NAD) 460mg
CLGA (NAC) 410mg
ESD rating
(8)
600V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensured specific performance limits. For ensured specifications and test conditions, see, the
Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
(2) Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode
range, the comparator will provide a proper output state. The low input voltage state must not be less than 0.3 V
DC
(or 0.3 V
DC
below
the magnitude of the negative power supply, if used) (at 25°C).
(3) This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of
the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is
also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go
to the V
+
voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive
and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than 0.3 V
DC
(at
25°)C.
(4) The low bias dissipation and the ON-OFF characteristics of the outputs keeps the chip dissipation very small (P
D
100mW), provided
the output transistors are allowed to saturate.
(5) The maximum power dissipation must be derated at elevated temperatures and is dictated by T
Jmax
(maximum junction temperature),
θ
JA
(Package junction to ambient thermal resistance), and T
A
(ambient temperature). The maximum allowable power dissipation at any
temperature is P
Dmax
= (T
Jmax
— T
A
) / θ
JA
or the number given in the Absolute Maximum Ratings, whichever is lower.
(6) SMD 5962–8773901 only
(7) Short circuits from the output to V
+
can cause excessive heating and eventual destruction. When considering short circuits to ground,
the maximum output current is approximately 20 mA independent of the magnitude of V
+
.
(8) Human Body model, 1.5 KΩ in series with 100 pF
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: LM139AQML LM139QML
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