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5962-8770003EA

Part # 5962-8770003EA
Description DAC 1CH R-2R 8BIT 16CDIP - Rail/Tube
Category IC
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Date Code: 9649
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
CMOS
8-Bit Buffered Multiplying DAC
AD7524
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
FEATURES
Microprocessor Compatible (6800, 8085, Z80, Etc.)
TTL/CMOS Compatible Inputs
On-Chip Data Latches
Endpoint Linearity
Low Power Consumption
Monotonicity Guaranteed (Full Temperature Range)
Latch Free (No Protection Schottky Required)
APPLICATIONS
Microprocessor Controlled Gain Circuits
Microprocessor Controlled Attenuator Circuits
Microprocessor Controlled Function Generation
Precision AGC Circuits
Bus Structured Instruments
GENERAL DESCRIPTION
The AD7524 is a low cost, 8-bit monolithic CMOS DAC
designed for direct interface to most microprocessors.
Basically an 8-bit DAC with input latches, the AD7524’s load
cycle is similar to the “write” cycle of a random access
memory. Using an advanced thin-film on CMOS fabrication
process, the AD7524 provides accuracy to 1/8 LSB with a typi-
cal power dissipation of less than 10 milliwatts.
A newly improved design eliminates the protection Schottky
previously required and guarantees TTL compatibility when
using a +5 V supply. Loading speed has been increased for
compatibility with most microprocessors.
Featuring operation from +5 V to +15 V, the AD7524 inter-
faces directly to most microprocessor buses or output ports.
Excellent multiplying characteristics (2- or 4-quadrant) make
the AD7524 an ideal choice for many microprocessor con-
trolled gain setting and signal control applications.
FUNCTIONAL BLOCK DIAGRAM
ORDERING GUIDE
Temperature Nonlinearity Package
Model
1
Range (V
DD
= +15 V) Option
2
AD7524JN –40°C to +85°C ±1/2 LSB N-16
AD7524KN –40°C to +85°C ±1/4 LSB N-16
AD7524LN –40°C to +85°C ±1/8 LSB N-16
AD7524JP –40°C to +85°C ±1/2 LSB P-20A
AD7524KP –40°C to +85°C ±1/4 LSB P-20A
AD7524LP –40°C to +85°C ±1/8 LSB P-20A
AD7524JR –40°C to +85°C ±1/2 LSB R-16A
AD7524AQ –40°C to +85°C ±1/2 LSB Q-16
AD7524BQ –40°C to +85°C ±1/4 LSB Q-16
AD7524CQ –40°C to +85°C ±1/8 LSB Q-16
AD7524SQ –55°C to +125°C ±1/2 LSB Q-16
AD7524TQ –55°C to +125°C ±1/4 LSB Q-16
AD7524UQ –55°C to +125°C ±1/8 LSB Q-16
AD7524SE –55°C to +125°C ±1/2 LSB E-20A
AD7524TE –55°C to +125°C ±1/4 LSB E-20A
AD7524UE –55°C to +125°C ±1/8 LSB E-20A
NOTES
1
To order MIL-STD-883, Class B processed parts, add/883B to part number.
Contact your local sales office for military data sheet. For U.S. Standard
Military Drawing (SMD) see DESC drawing #5962-87700.
2
E = Leadless Ceramic Chip Carrier: N = Plastic DIP; P = Plastic Leaded Chip
Carrier; Q = Cerdip; R = SOIC.
REV. B
–2–
AD7524–SPECIFICATIONS
Limit, T
A
= +258C Limit, T
MIN
, T
MAX
1
Parameter V
DD
= +5 V V
DD
= +15 V V
DD
= 5 V V
DD
= +15 V Units Test Conditions/Comments
STATIC PERFORMANCE
Resolution 8 8 8 8 Bits
Relative Accuracy
J, A, S Versions ±1/2 ±1/2 ± 1/2 ±1/2 LSB max
K, B, T Versions ±1/2 ±1/4 ± 1/2 ±1/4 LSB max
L, C, U Versions ±1/2 ±1/8 ± 1/2 ±1/8 LSB max
Monotonicity Guaranteed Guaranteed Guaranteed Guaranteed
Gain Error
2
±2 1/2 ±1 1/4 ±3 1/2 ±1 1/2 LSB max
Average Gain TC
3
±40 ±10 ±40 ±10 ppm/°C Gain TC Measured from +25°C to
T
MIN
or from +25°C to T
MAX
DC Supply Rejection,
3
Gain/V
DD
0.08 0.02 0.16 0.04 % FSR/% max V
DD
= ±10%
0.002 0.001 0.01 0.005 % FSR/% typ
Output Leakage Current
I
OUT1
(Pin 1) ±50 ±50 ±400 ±200 nA max DB0–DB7 = 0 V; WR, CS = 0 V; V
REF
= ±10 V
I
OUT2
(Pin 2) ±50 ±50 ±400 ±200 nA max DB0–DB7 = V
DD
; WR, CS = 0 V; V
REF
= ±10 V
DYNAMIC PERFORMANCE
Output Current Settling Time
3
(to 1/2 LSB) 400 250 500 350 ns max OUT1 Load = 100 , C
EXT
= 13 pF; WR, CS =
0 V; DB0–DB7 = 0 V to V
DD
to 0 V.
AC Feedthrough
3
at OUT1 0.25 0.25 0.5 0.5 % FSR max V
REF
= ±10 V, 100 kHz Sine Wave; DB0–DB7 =
at OUT2 0.25 0.25 0.5 0.5 % FSR max 0 V; WR, CS = 0 V
REFERENCE INPUT
R
IN
(Pin 15 to GND)
4
5555 k min
20 20 20 20 k max
ANALOG OUTPUTS
Output Capacitance
3
C
OUT1
(Pin 1) 120 120 120 120 pF max DB0–DB7 = V
DD
; WR, CS = 0 V
C
OUT2
(Pin 2) 30 30 30 30 pF max
C
OUT1
(Pin 1) 30 30 30 30 pF max DB0–DB7 = 0 V; WR, CS = 0 V
C
OUT2
(Pin 2) 120 120 120 120 pF max
DIGITAL INPUTS
Input HIGH Voltage Requirement
V
IH
+2.4 +13.5 +2.4 +13.5 V min
Input LOW Voltage Requirement
V
IL
+0.8 +1.5 +0.5 +1.5 V max
Input Current
I
IN
±1 ±1 ±10 ±10 µA max V
IN
= 0 V or V
DD
Input Capacitance
3
DB0–DB7 5 5 5 5 pF max V
IN
= 0 V
WR, CS 20 20 20 20 pF max V
IN
= 0 V
SWITCHING CHARACTERISTICS
Chip Select to Write Setup Time
5
See Timing Diagram
t
CS
t
WR
= t
CS
AD7524J, K, L, A, B, C 170 100 220 130 ns min
AD7524S, T, U 170 100 240 150 ns min
Chip Select to Write Hold Time
t
CH
All Grades 0 0 0 0 ns min
Write Pulse Width
t
WR
t
CS
t
WR
, t
CH
0
AD7524J, K, L, A, B, C 170 100 220 130 ns min
AD7524S, T, U 170 100 240 150 ns min
Data Setup Time
t
DS
AD7524J, K, L, A, B, C 135 60 170 80 ns min
AD7524S, T, U 135 60 170 100 ns min
Data Hold Time
t
DH
All Grades 10 10 10 10 ns min
POWER SUPPLY
I
DD
1 2 2 2 mA max All Digital Inputs V
IL
or V
IH
100 100 500 500 µA max All Digital Inputs 0 V or V
DD
NOTES
1
Temperature ranges as follows: J, K, L versions: –40°C to +85°C
A, B, C versions: –40°C to +85°C
S, T, U versions: –55°C to +125°C
2
Gain error is measured using internal feedback resistor. Full-Scale Range (FSR) = V
REF
.
3
Guaranteed not tested.
4
DAC thin-film resistor temperature coefficient is approximately –300 ppm/°C.
5
AC parameter, sample tested @ +25°C to ensure conformance to specification.
Specifications subje
ct to change without notice
.
(V
REF
= +10 V, V
OUT1
= V
OUT2
= 0 V, unless otherwise noted)
AD7524
REV. B
–3–
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25°C, unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +17 V
V
RFB
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V
V
REF
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V
Digital Input Voltage to GND . . . . . . . . –0.3 V to V
DD
+0.3 V
OUT1, OUT2 to GND . . . . . . . . . . . . . –0.3 V to V
DD
+0.3 V
Power Dissipation (Any Package)
To +75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
Derates above 75°C by . . . . . . . . . . . . . . . . . . . . 6 mW/°C
Operating Temperature
Commercial (J, K, L) . . . . . . . . . . . . . . . . . –40°C to +85°C
Industrial (A, B, C) . . . . . . . . . . . . . . . . . . –40°C to +85°C
Extended (S, T, U) . . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7524 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
TERMINOLOGY
RELATIVE ACCURACY: A measure of the deviation from a
straight line through the end points of the DAC transfer function.
Normally expressed as a percentage of full scale range. For the
AD7524 DAC, this holds true over the entire V
REF
range.
RESOLUTION: Value of the LSB. For example, a unipolar con-
verter with n bits has a resolution of (2
–n
) (V
REF
). A bipolar con-
verter of n bits has a resolution of [2
–(n–1)
] [V
REF
]. Resolution in no
way implies linearity.
GAIN ERROR: Gain Error is a measure of the output error be-
tween an ideal DAC and the actual device output. It is measured
with all 1s in the DAC after offset error has been adjusted out
and is expressed in LSBs. Gain Error is adjustable to zero with
an external potentiometer.
FEEDTHROUGH ERROR: Error caused by capacitive cou-
pling from V
REF
to output with all switches OFF.
OUTPUT CAPACITANCE: Capacity from OUT1 and
OUT2 terminals to ground.
OUTPUT LEAKAGE CURRENT: Current which appears
on OUT1 terminal with all digital inputs LOW or on OUT2
terminal when all inputs are HIGH. This is an error current
which contributes an offset voltage at the amplifier output.
PIN CONFIGURATIONS
DIP, SOIC PLCC
LCCC
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