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5962-8688301CA

Part # 5962-8688301CA
Description
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

1
Data sheet acquired from Harris Semiconductor
SCHS118C
Features
Buffered Inputs
Typical Propagation Delay: 7ns at V
CC
= 5V,
C
L
= 15pF, T
A
= 25
o
C
Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
CMOS Input Compatibility, I
l
1µA at V
OL
, V
OH
Description
The CD54HC08, CD54HCT08, CD74HC08, and
CD74HCT08 logic gates utilize silicon gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The 74HCT logic family is functionally pin
compatible with the standard 74LS logic family.
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C) PACKAGE
CD54HC08F3A -55 to 125 14 Ld CERDIP
CD54HCT08F3A -55 to 125 14 Ld CERDIP
CD74HC08E -55 to 125 14 Ld PDIP
CD74HC08M -55 to 125 14 Ld SOIC
CD74HC08MT -55 to 125 14 Ld SOIC
CD74HC08M96 -55 to 125 14 Ld SOIC
CD74HC08PW -55 to 125 14 Ld TSSOP
CD74HC08PWR -55 to 125 14 Ld TSSOP
CD74HCT08E -55 to 125 14 Ld PDIP
CD74HCT08M -55 to 125 14 Ld SOIC
CD74HCT08MT -55 to 125 14 Ld SOIC
CD74HCT08M96 -55 to 125 14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel
of 250.
August 1997 - Revised July 2004
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2004, Texas Instruments Incorporated
CD54HC08, CD74HC08,
CD54HCT08, CD74HCT08
High-Speed CMOS Logic
Quad 2-Input AND Gate
[ /Title
(CD54H
C08,
CD54H
CT08,
CD74H
C08,
CD74H
CT08)
/Sub-
ject
(High
2
Pinout
CD54HC08, CD54HCT08,
(CERDIP)
CD74HC08
(PDIP, SOIC, TSSOP)
CD74HCT08
(PDIP, SOIC)
TOP VIEW
Functional Diagram
TRUTH TABLE
INPUTS OUTPUT
nA nB nY
LLL
LHL
HLL
HHH
H = High Voltage Level, L = Low Voltage Level
1A
1B
1Y
2A
2B
2Y
GND
V
CC
4B
4A
4Y
3B
3A
3Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
2A
2B
2Y
GND
1
2
3
4
5
6
14
13
12
11
V
CC
4Y
3Y
3B
4A
4B
10
8
7
9
3A
1Y
CD54HC08, CD74HC08, CD54HCT08, CD74HCT08
3
HC Logic Symbol HCT Logic Symbol
nA
nB
nY
nA
nB
nY
CD54HC08, CD74HC08, CD54HCT08, CD74HCT08
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