1
Data sheet acquired from Harris Semiconductor
SCHS142F
September 1997 - Revised October 2003
Features
• Overriding Reset Terminates Output Pulse
• Triggering From the Leading or Trailing Edge
• Q and
Q Buffered Outputs
• Separate Resets
• Wide Range of Output-Pulse Widths
• Schmitt Trigger on Both
A and B Inputs
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
o
C to 125
o
C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30%of V
CC
at
V
CC
= 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤ 1µA at V
OL
, V
OH
Description
The ’HC123, ’HCT123, CD74HC423 and CD74HCT423 are
dual monostable multivibrators with resets. They are all
retriggerable and differ only in that the 123 types can be
triggered by a negative to positive reset pulse; whereas the
423 types do not have this feature. An external resistor (R
X
)
and an external capacitor (C
X
) control the timing and the
accuracy for the circuit. Adjustment of Rx and C
X
provides a
wide range of output pulse widths from the Q and
Q
terminals. Pulse triggering on the
A and B inputs occur at a
particular voltage level and is not related to the rise and fall
times of the trigger pulses.
Once triggered, the output pulse width may be extended by
retriggering inputs
A and B. The output pulse can be
terminated by a LOW level on the Reset (R) pin. Trailing
edge triggering (
A) and leading edge triggering (B) inputs
are provided for triggering from either edge of the input
pulse. If either Mono is not used each input on the unused
device (
A, B, and R) must be terminated high or low.
The minimum value of external resistance, Rx is typically
5kΩ. The minimum value external capacitance, CX, is 0pF.
The calculation for the pulse width is t
W
= 0.45 R
X
C
X
at
V
CC
= 5V.
Ordering Information
PART NUMBER TEMP. RANGE (
o
C) PACKAGE
CD54HC123F3A -55 to 125 16 Ld CERDIP
CD54HCT123F3A -55 to 125 16 Ld CERDIP
CD74HC123E -55 to 125 16 Ld PDIP
CD74HC123M -55 to 125 16 Ld SOIC
CD74HC123MT -55 to 125 16 Ld SOIC
CD74HC123M96 -55 to 125 16 Ld SOIC
CD74HC123NSR -55 to 125 16 Ld SOP
CD74HC123PW -55 to 125 16 Ld TSSOP
CD74HC123PWR -55 to 125 16 Ld TSSOP
CD74HC123PWT -55 to 125 16 Ld TSSOP
CD74HC423E -55 to 125 16 Ld PDIP
CD74HC423M -55 to 125 16 Ld SOIC
CD74HC423MT -55 to 125 16 Ld SOIC
CD74HC423M96 -55 to 125 16 Ld SOIC
CD74HC423NSR -55 to 125 16 Ld SOP
CD74HCT123E -55 to 125 16 Ld PDIP
CD74HCT123M -55 to 125 16 Ld SOIC
CD74HCT123MT -55 to 125 16 Ld SOIC
CD74HCT123M96 -55 to 125 16 Ld SOIC
CD74HCT423E -55 to 125 16 Ld PDIP
CD74HCT423MT -55 to 125 16 Ld SOIC
CD74HCT423M96 -55 to 125 16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54/74HC123, CD54/74HCT123,
CD74HC423, CD74HCT423
High-Speed CMOS Logic Dual Retriggerable
Monostable Multivibrators with Resets
[ /Title
(CD74
HC123
,
C
D74
HCT12
3,
CD74
HC423
,
C
D74
HCT42
3)
/Sub-
ject
(High
Speed
