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54FCT374DB

Part # 54FCT374DB
Description
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT374/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
1
JUNE 2002MILITARY AND COMMERCIAL TEMPERATURE RANGES
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2002 Integrated Device Technology, Inc. DSC-5423/2
FEATURES:
IDT54FCT374 equal to FAST™ speed and drive
IDT54/74FCT374A up to 30% faster than FAST
IDT74FCT374C up to 50% faster than FAST
•IOL = 48mA (commercial) and 32mA (military)
CMOS power levels (1mW typ. static)
Edge-triggered master/slave, D-type flip-flops
Buffered common clock and buffered common 3-state control
MIlitary product compliant to MIL-STD-883, Class B
Meets or exceeds JEDEC Standard 18 specifications
Available in the following packages:
Commercial: SOIC
Military: CERDIP, LCC
FUNCTIONAL BLOCK DIAGRAM
IDT54/74FCT374/A/C
FAST CMOS OCTAL
D REGISTERS (3-STATE)
DESCRIPTION:
The FCT374 is an 8-bit register built using an advanced dual metal CMOS
technology. These registers consist of eight D-type flip-flops with a buffered
common clock and buffered 3-state output control. When the output enable
(OE) is low, the eight outputs are enabled. When the OE input is high, the
outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements of the D inputs
is transferred to the O outputs on the low-to-high transition of the clock input.
The FCT374 has non-inverting outputs with respect to the data at the D
inputs.
CP
O0 O1
O2 O3
O4 O5
O6
O7
OE
D
Q
CP
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP CP
CP CP
CP CP
D0 D1
D2 D3
D4 D5
D6 D7
MILITARY AND COMMERCIAL TEMPERATURE RANGES
2
IDT54/74FCT374/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
PIN CONFIGURATION
CERDIP/ SOIC
TOP VIEW
LCC
TOP VIEW
Symbol Rating Commercial Military Unit
V
TERM
(2)
Terminal Voltage –0.5 to +7 –0.5 to +7 V
with Respect to GND
V
TERM
(3)
Terminal Voltage –0.5 to VCC –0.5 to VCC V
with Respect to GND
TA Operating Temperature 0 to +70 –55 to +125 °C
TBIAS Temperature under BIAS –55 to +125 –65 to +135 °C
TSTG Storage Temperature –55 to +125 –65 to +150 °C
PT Power Dissipation 0.5 0.5 W
I
OUT DC Output Current 120 120 mA
ABSOLUTE MAXIMUM RATINGS
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Input and Vcc terminals only.
3. Output and I/O terminals only.
Symbol Parameter
(1)
Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 6 10 pF
C
OUT Output Capacitance VOUT = 0V 8 12 pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
1
23
4
5
7
9
6
8
10 11 12 13
14
15
16
17
18
1920
O6
D7
D6
O5
D5
O
E
D
0
O
0
V
C
C
O
7
O
3
G
N
D
C
P
O
4
D
4
INDEX
D1
O1
D3
O2
D2
2
3
1
16
15
14
11
19
18
20
17
13
12
5
6
7
4
8
9
10
D1
O0
D0
VCC
O1
D3
O2
D2
O3
GND
O
7
O6
D7
D6
O5
O4
D5
D4
CP
OE
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
NC = No Change
= LOW-to-HIGH transition
FUNCTION TABLE
(1)
Inputs Outputs Internal
Function OE CP Dx Qx Qx
High-Z H L X Z N C
HHXZNC
Load L LLH
Register L HHL
H LZH
H HZL
Pin Names Description
Dx D flip-flop data inputs
CP Clock Pulse for the register. Enters data on LOW-to-
HIGH transition.
Ox 3-State Outputs (TRUE)
O x 3-State Outputs (INVERTED)
OE Active LOW 3-State Output Enable Input
PIN DESCRIPTION
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT374/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
3
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
VIH Input HIGH Level Guaranteed Logic HIGH Level 2 V
VIL Input LOW Level Guaranteed Logic LOW Level 0.8 V
IIH Input HIGH Current VI = VCC —— 5
V
CC = Max. VI = 2.7V 5
(4)
µA
I
IL Input LOW Current VI = 0.5V 5
(4)
VI = GND 5
IOZH VO = VCC —— 10
Off State (High Impedance) V
CC = Max. VO = 2.7V 10
(4)
µA
I
OZL Output Current VO = 0.5V 10
(4)
VO = GND 10
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA –0.7 –1.2 V
IOS Short Circuit Current VCC = Max., VO = GND
(3)
–60 –120 mA
V
OH Output HIGH Voltage VCC = 3V, VIN = VLC or VHC, IOH = –32µAVHC VCC
VCC = Min IOH = –300µAVHC VCC —V
VIN = VIH or VIL IOH = –12mA MIL 2.4 4.3
IOH = –15mA COM'L 2.4 4.3
VOL Output LOW Voltage VCC = 3V, VIN = VLC or VHC, IOL = 300µA GND VLC
VCC = Min IOL = 300µA GND VLC
(4)
V
VIN = VIH or VIL IOL = 32mA MIL 0.3 0.5
IOL = 48mA COM'L 0.3 0.5
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC - 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ±5%, Military: TA = -55°C to +125°C, VCC = 5.0V ±10%
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not ttested.
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