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TPS54620RGYR

Part # TPS54620RGYR
Description Conv DC-DC Single Step Down 1.6V to 17V 14-Pin VQFN EP T/R
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

TPS54620
SLVS949 MAY 2009 ........................................................................................................................................................................................................
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
T
J
= 40 ° C to 150 ° C, VIN = 4.5V to 17V, PVIN = 1.6V to 17V (unless otherwise noted)
DESCRIPTION CONDITIONS MIN TYP MAX UNIT
THERMAL SHUTDOWN
Thermal shutdown 160 175 ° C
Thermal shutdown hysterisis 10 ° C
TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN)
Minimum switching frequency Rrt = 240 k (1%) 180 200 220 kHz
Switching frequency Rrt = 100 k (1%) 400 480 560 kHz
Maximum switching frequency Rrt = 29 k (1%) 1440 1600 1760 kHz
Minimum pulsewidth 20 ns
RT/CLK high threshold 2 V
RT/CLK low threshold 0.8 V
RT/CLK falling edge to PH rising edge delay Measure at 500 kHz with RT resistor in series 66 ns
Switching frequency range (RT mode set point 200 1600 kHz
and PLL mode)
PH (PH PIN)
Minimum on time Measured at 90% to 90% of VIN, 25 ° C, I
PH
= 2A 94 135 ns
Minimum off time BOOT-PH 3 V 0 ns
BOOT (BOOT PIN)
BOOT-PH UVLO 2.1 3 V
SLOW START AND TRACKING (SS/TR PIN)
SS charge current 2.3 µ A
SS/TR to VSENSE matching V(SS/TR) = 0.4 V 29 60 mV
POWER GOOD (PWRGD PIN)
VSENSE threshold VSENSE falling (Fault) 91 % Vref
VSENSE rising (Good) 94 % Vref
VSENSE rising (Fault) 109 % Vref
VSENSE falling (Good) 106 % Vref
Output high leakage VSENSE = Vref, V(PWRGD) = 5.5 V 30 100 nA
Output low I(PWRGD) = 2 mA 0.3 V
Minimum VIN for valid output V(PWRGD) < 0.5V at 100 µ A 0.6 1 V
Minimum SS/TR voltage for PWRGD 1.4 V
4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s) :TPS54620
DEVICE INFORMATION
PIN ASSIGNMENTS
1
2
3
4
5
6
7
9
8
10
PowerPAD
RGY (TopView )
EN
GND
VIN
VSENSE
RT/CLK
SS/TR
PH
BOOT
PWRGD
COMP
(15)
PVIN
PVIN
PH
GND
11
12
13
14
TPS54620
www.ti.com
........................................................................................................................................................................................................ SLVS949 MAY 2009
PIN FUNCTIONS
PIN DESCRIPTION
NAME No.
RT/CLK 1 Automatically selects between RT mode and CLK mode. An external timing resistor adjusts the switching
frequency of the device; In CLK mode, the device synchronizes to an external clock.
GND 2, 3 Return for control circuitry and low-side power MOSFET.
PVIN 4, 5 Power input. Supplies the power switches of the power converter.
VIN 6 Supplies the control circuitry of the power converter.
VSENSE 7 Inverting input of the gm error amplifier.
COMP 8 Error amplifier output, and input to the output switch current comparator. Connect frequency compensation to this
pin.
SS/TR 9 Slow-start and tracking. An external capacitor connected to this pin sets the internal voltage reference rise time.
The voltage on this pin overrides the internal reference. It can be used for tracking and sequencing.
EN 10 Enable pin. Float to enable. Adjust the input undervoltage lockout with two resistors.
PH 11, 12 The switch node.
BOOT 13 A bootstrap cap is required between BOOT and PH. The voltage on this cap carries the gate drive voltage for the
high-side MOSFET.
PWRGD 14 Power Good fault pin. Asserts low if output voltage is low due to thermal shutdown, dropout, over-voltage, EN
shutdown or during slow start.
PowerPAD 15 Thermal pad of the package and signal ground. It must be soldered down for proper operation.
Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s) :TPS54620
ERROR
AMPLIFIER
Boot
Charge
UVLO
Current
Sense
Oscillator
withPLL
Slope
Compensation
and
Clamp
Voltage
Reference
VSENSE
SS/TR
COMP
RT/CLK
PH
BOOT
VIN
GND
Thermal
Shutdown
EN
Enable
Comparator
Shutdown
Logic
Shutdown
Enable
Threshold
Logic
Shutdown
PWRGD
POWERPAD
PowerStage
& Deadtime
Control
Logic
LSMOSFET
CurrentLimit
OV
MinimumClamp
PulseSkip
Ip Ih
PVIN
UV
HSMOSFET
Current
Comparator
Current
Sense
RegulatorVIN
Boot
UVLO
PH
GND
PVIN
OverloadRecovery
TPS54620
SLVS949 MAY 2009 ........................................................................................................................................................................................................
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
6 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s) :TPS54620
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