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TPS7A4901DGNR

Part # TPS7A4901DGNR
Description LDO Regulator Pos 1.194V to 33V 0.15A 8-Pin HTSSOP EP T/R
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

2
1
3
4
7
8
6
5
FB
NC
GND
OUT
EN
NR/SS
DNC
IN
DGNPACKAGE
3mm 5mmMSOP-8PowerPAD
(TOPVIEW)
´
TPS7A49
IN
+18V
OUT
EN GND
-18V
TPS7A30
IN OUT
EN GND
EVM
+15V
-15V
TPS7A49xx
www.ti.com
SBVS121A AUGUST 2010REVISED SEPTEMBER 2010
+36V, +150mA, Ultralow-Noise, Positive LINEAR REGULATOR
1
FEATURES
DESCRIPTION
23
Input Voltage Range: +3V to +36V
The TPS7A49xx series of devices are positive,
high-voltage (+36V), ultralow noise (15.4mV
RMS
, 72dB
Noise:
PSRR) linear regulators capable of sourcing a load of
12.7mV
RMS
(20Hz to 20kHz)
150mA.
15.4mV
RMS
(10Hz to 100kHz)
These linear regulators include a CMOS
Power-Supply Ripple Rejection:
logic-level-compatible enable pin and
72dB (120Hz)
capacitor-programmable soft-start function that allows
for customized power-management schemes. Other
52dB (10Hz to 400kHz)
features available include built-in current limit and
Adjustable Output: +1.194V to +33V
thermal shutdown protection to safeguard the device
Output Current: 150mA
and system during fault conditions.
Dropout Voltage: 260mV at 100mA
The TPS7A49xx family is designed using bipolar
Stable with Ceramic Capacitors 2.2mF
technology, and is ideal for high-accuracy,
high-precision instrumentation applications where
CMOS Logic-Level-Compatible Enable Pin
clean voltage rails are critical to maximize system
Built-In, Fixed, Current-Limit and Thermal
performance. This design makes it an excellent
Shutdown Protection
choice to power operational amplifiers,
Available in High Thermal Performance
analog-to-digital converters (ADCs), digital-to-analog
MSOP-8 PowerPAD™ Package
converters (DACs), and other high-performance
analog circuitry.
Operating Tempature Range: –40°C to +125°C
In addition, the TPS7A49xx family of linear regulators
APPLICATIONS
is suitable for post dc/dc converter regulation. By
filtering out the output voltage ripple inherent to dc/dc
Supply Rails for Op Amps, DACs, ADCs, and
switching conversion, maximum system performance
Other High-Precision Analog Circuitry
is provided in sensitive instrumentation, test and
Audio
measurement, audio, and RF applications.
Post DC/DC Converter Regulation and Ripple
Filtering
For applications where both positive and negative
high-performance rails are required, consider TI’s
Test and Measurement
TPS7A30xx family of negative high-voltage,
RX, TX, and PA Circuitry
ultralow-noise linear regulators as well.
Industrial Instrumention
Base Stations and Telecom Infrastrucure
Typical Application
Post DC/DC Converter Regulation for
High-Performace Analog Circuitry
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2PowerPAD is a trademark of Texas Instruments.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS7A49xx
SBVS121A AUGUST 2010REVISED SEPTEMBER 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT V
OUT
TPS7A49xx yyy z XX is nominal output voltage (01 = Adjustable).
(2)
YYY is package designator.
Z is package quantity.
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
device product folder on www.ti.com.
(2) For fixed -1.2V operation, tie FB to OUT.
ABSOLUTE MAXIMUM RATINGS
(1)
Over operating free-air temperature range (unless otherwise noted).
VALUE
MIN MAX UNIT
IN pin to GND pin –0.3 +36 V
OUT pin to GND pin –0.3 +33 V
OUT pin to IN pin –36 +0.3 V
FB pin to GND pin –0.3 +2 V
Voltage FB pin to IN pin –36 +0.3 V
EN pin to IN pin –36 0.3
EN pin to GND pin –0.3 +36 V
NR/SS pin to IN pin –36 +0.3 V
NR/SS pin to GND pin –0.3 +2 V
Current Peak output Internally limited
Operating virtual junction, T
J
–40 +125 °C
Temperature
Storage, T
stg
–65 +150 °C
Human body model (HBM) 500 V
Electrostatic discharge rating
Charged device model (CDM) 500 V
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to
absolute-maximum rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
TPS7A49xx
THERMAL METRIC
(1)
DGN UNITS
8 PINS
q
JA
Junction-to-ambient thermal resistance 55.09
q
JC(top)
Junction-to-case(top) thermal resistance 8.47
q
JB
Junction-to-board thermal resistance
°C/W
y
JT
Junction-to-top characterization parameter 0.36
y
JB
Junction-to-board characterization parameter 14.6
q
JC(bottom)
Junction-to-case(bottom) thermal resistance
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
DISSIPATION RATINGS
DERATING FACTOR T
A
+25°C POWER T
A
= +70°C POWER T
A
= +85°C POWER
BOARD PACKAGE R
qJA
R
qJC
ABOVE T
A
= +25°C RATING RATING RATING
High-K
(1)
DGN 55.9°C/W 8.47°C/W 16.6mW/°C 1.83W 1.08W 0.833W
(1) The JEDEC High-K (2s2p) board design used to derive this data was a 3-inch x 3-inch multilayer board with 2-ounce internal power and
ground planes and 2-ounce copper traces on top and bottom of the board.
2 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated
D DV ( V )
OUT IN
V
OUT(NOM)
D DV ( I )
OUT OUT
V
OUT(NOM)
TPS7A49xx
www.ti.com
SBVS121A AUGUST 2010REVISED SEPTEMBER 2010
ELECTRICAL CHARACTERISTICS
At T
J
= –40°C to +125°C, V
IN
= V
OUT(NOM)
+ 1.0V or V
IN
= 3.0V (whichever is greater), V
EN
= V
IN
, I
OUT
= 1mA, C
IN
= 2.2mF, C
OUT
= 2.2mF,
C
NR/SS
= 0nF, and the FB pin tied to OUT, unless otherwise noted.
TPS7A49xx
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IN
Input voltage range 3.0 35 V
V
REF
Internal reference T
J
= +25°C, V
NR/SS
= V
REF
1.176 1.194 1.212 V
Output voltage range
(1)
V
IN
V
OUT(NOM)
+ 1.0V V
REF
33.0 V
Nominal accuracy T
J
= +25°C, V
IN
= V
OUT(NOM)
+ 0.5V –1.5 +1.5 %V
OUT
V
OUT
V
OUT(NOM)
+ 1.0V V
IN
35V
Overall accuracy –2.5 +2.5 %V
OUT
1mA I
OUT
150mA
Line regulation T
J
= +25°C, V
OUT(NOM)
+ 1.0V V
IN
35V 0.11 %V
OUT
Load regulation T
J
= +25°C, 1mA I
OUT
150mA 0.04 %V
OUT
V
IN
= 95% V
OUT(NOM)
, I
OUT
= 100mA 260 mV
V
DO
Dropout voltage
V
IN
= 95% V
OUT(NOM)
, I
OUT
= 150mA 333 600 mV
I
LIM
Current limit V
OUT
= 90% V
OUT(NOM)
220 309 500 mA
I
OUT
= 0mA 61 100 mA
I
GND
Ground current
I
OUT
= 100mA 800 mA
I
SHDN
Shutdown supply current V
EN
= +0.4V 0.8 3.0 mA
I
FB
Feedback current
(2)
3 100 nA
V
EN
= V
IN
= V
OUT(NOM)
+ 1.0V 0.02 1.0 mA
I
EN
Enable current
V
EN
= V
IN
= +35V 0.2 1.0 mA
V
EN_HI
Enable high-level voltage +2.1 V
IN
V
V
EN_LO
Enable low- level voltage 0 +0.4 V
V
IN
= +3V, V
OUT(NOM)
= V
REF
, C
OUT
= 10mF,
15.4 mV
RMS
C
NR/SS
= 10nF, BW = 10Hz to 100kHz
V
NOISE
Output noise voltage
V
IN
= +6.2V, V
OUT(NOM)
= +5V, C
OUT
= 10mF,
C
NR/SS
= C
BYP
(3)
= 10nF, BW = 10Hz to 21.15 mV
RMS
100kHz
V
IN
= +6.2V, V
OUT(NOM)
= +5V, C
OUT
= 10mF,
PSRR Power-supply rejection ratio 72 dB
C
NR/SS
= C
BYP
(3)
= 10nF, f = 120Hz
Shutdown, temperature increasing +170 °C
T
SD
Thermal shutdown temperature
Reset, temperature decreasing +150 °C
Operating junction temperature
T
J
–40 +125 °C
range
(1) To ensure stability at no load conditions, a current from the feedback resistive network equal to or greater than 5mA is required.
(2) I
FB
> 0 flows out of the device.
(3) C
BYP
refers to a bypass capacitor connected to the FB and OUT pins.
Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 3
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