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5001CDR

Part # 5001CDR
Description
Category IC
Availability Out of Stock
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

TL5001, TL5001A
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
SLVS084F – APRIL 1994 – REVISED JANUARY 2002
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Complete PWM Power Control
3.6-V to 40-V Operation
Internal Undervoltage-Lockout Circuit
Internal Short-Circuit Protection
Oscillator Frequency . . . 20 kHz to 500 kHz
Variable Dead Time Provides Control Over
Total Range
±3% Tolerance on Reference Voltage
(TL5001A)
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
description
The TL5001 and TL5001A incorporate on a single
monolithic chip all the functions required for a
pulse-width-modulation (PWM) control circuit. De-
signed primarily for power-supply control, the
TL5001/A contains an error amplifier, a regulator, an
oscillator, a PWM comparator with a dead-time-con-
trol input, undervoltage lockout
(UVLO), short-circuit protection (SCP), and an open-collector output transistor. The TL5001A has a typical
reference voltage tolerance of ±3% compared to ±5% for the TL5001.
The error-amplifier common-mode voltage ranges from 0 V to 1.5 V. The noninverting input of the error amplifier
is connected to a 1-V reference. Dead-time control (DTC) can be set to provide 0% to 100% dead time by connecting
an external resistor between DTC and GND. The oscillator frequency is set by terminating RT with an external
resistor to GND. During low V
CC
conditions, the UVLO circuit turns the output off until V
CC
recovers to its normal
operating range.
The TL5001C and TL5001AC are characterized for operation from –20°C to 85°C. The TL5001I and TL5001AI are
characterized for operation from –40°C to 85°C. The TL5001Q and TL5001AQ are characterized for operation from
–40°C to 125°C. The TL5001M and TL5001AM are characterized for operation from –55°C to 125°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
SMALL OUTLINE
(D)
PLASTIC DIP
(P)
CERAMIC DIP
(JG)
CHIP CARRIER
(FK)
20°Cto85°C
TL5001CD TL5001CP — —
–
20°C
to
85°C
TL5001ACD TL5001ACP — —
40°Cto85°C
TL5001ID TL5001IP — —
–
40°C
to
85°C
TL5001AID TL5001AIP — —
40°Cto125°C
TL5001QD — — —
–
40°C
to
125°C
TL5001AQD — — —
55°Cto125°C
— — TL5001MJG TL5001MFK
–
55°C
to
125°C
— — TL5001AMJG TL5001AMFK
The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL5001CDR).
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
OUT
V
CC
COMP
FB
GND
RT
DTC
SCP
D, JG OR P PACKAGE
(TOP VIEW)
1920132
17
18
16
15
14
1312119 10
5
4
6
7
8
NC
RT
NC
DTC
NC
NC
V
CC
NC
COMP
NC
NC
OUT
NC
GND
NC
FB
NC
SCP
NC
NC
FK PACKAGE
(TOP VIEW)
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
TL5001, TL5001A
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
SLVS084F – APRIL 1994 – REVISED JANUARY 2002
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematic for typical application
TL5001/A
FB
COMP
V
O
DTC
RT
V
I
+
SCP
V
CC
+
TPS1101
GND
8
7
6
5
2
1
3
4
V
O
functional block diagram
GND
8
OUT
SCP
COMP
FB
5
3
4
–
+
DTC
RT
67
Comparator 2
SCP
PWM/DTC
Comparator
OSC
Comparator 1
SCP
Amplifier
Error
UVLO
V
CC
2
1
1 V
1.5 V 1 V
Reference
Voltage
I
DT
2.5 V
TL5001, TL5001A
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
SLVS084F – APRIL 1994 – REVISED JANUARY 2002
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
detailed description
voltage reference
A 2.5-V regulator operating from V
CC
is used to power the internal circuitry of the TL5001 and TL5001A and as a
reference for the error amplifier and SCP circuits. A resistive divider provides a 1-V reference for the error amplifier
noninverting input which typically is within 2% of nominal over the operating temperature range.
error amplifier
The error amplifier compares a sample of the dc-to-dc converter output voltage to the 1-V reference and generates
an error signal for the PWM comparator. The dc-to-dc converter output voltage is set by selecting the error-amplifier
gain (see Figure 1), using the following expression:
V
O
= (1 + R1/R2) (1 V)
To PWM
Comparator
V
ref
= 1 V
4
V
I(FB)
3
+
–
R2
R1
COMP
FB
Compensation
Network
TL5001/A
GND
8
Figure 1. Error-Amplifier Gain Setting
The error-amplifier output is brought out as COMP for use in compensating the dc-to-dc converter control loop for
stability. Because the amplifier can only source 45 µA, the total dc load resistance should be 100 kΩ or more.
oscillator/PWM
The oscillator frequency (f
osc
) can be set between 20 kHz and 500 kHz by connecting a resistor between RT and
GND. Acceptable resistor values range from 15 kΩ to 250 kΩ. The oscillator frequency can be determined by using
the graph shown in Figure 5.
The oscillator output is a triangular wave with a minimum value of approximately 0.7 V and a maximum value of
approximately 1.3 V. The PWM comparator compares the error-amplifier output voltage and the DTC input voltage
to the triangular wave and turns the output transistor off whenever the triangular wave is greater than the lesser of
the two inputs.
dead-time control (DTC)
DTC provides a means of limiting the output-switch duty cycle to a value less than 100%, which is critical for boost
and flyback converters. A current source generates a reference current (I
DT
) at DTC that is nominally equal to the
current at the oscillator timing terminal, RT. Connecting a resistor between DTC and GND generates a dead-time
reference voltage (V
DT
), which the PWM/DTC comparator compares to the oscillator triangle wave as described
in the previous section. Nominally, the maximum duty cycle is 0% when V
DT
is 0.7 V or less and 100% when V
DT
is 1.3 V or greater. Because the triangle wave amplitude is a function of frequency and the source impedance of
RT is relatively high (1250 Ω), choosing R
DT
for a specific maximum duty cycle, D, is accomplished using the
following equation and the voltage limits for the frequency in question as found in Figure 11 (V
osc
max and V
osc
min
are the maximum and minimum oscillator levels):
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