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SN74LVT16501DGGR

Part # SN74LVT16501DGGR
Description Bus XCVR Single 18-CH 3-ST 56-Pin TSSOP T/R - Tape and Ree
Category IC
Availability In Stock
Qty 40
Qty Price
1 - 8 $1.02296
9 - 16 $0.81372
17 - 25 $0.76722
26 - 33 $0.71297
34 + $0.63548
Manufacturer Available Qty
Texas Instruments
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

SN54LVT16501, SN74LVT16501
3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS147G – MAY 1992 – REVISED NOVEMBER 1996
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
SN54LVT16501 SN74LVT16501
V
CC
= 3.3 V
± 0.3 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
V
CC
= 2.7 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
f
clock
Clock frequency 0 150 0 125 0 150 0 125 MHz
t
Pulse duration
LE high 3.3 3.3 3.3 3.3
ns
t
w
P
u
lse
d
u
ration
CLK high or low 3.3 3.3 3.3 3.3
ns
A before CLKAB↑ 1.6 2.1 1.6 2.1
t
Setup time
B before CLKBA↑ 1.6 2.1 1.6 2.1
ns
t
su
S
e
t
up
ti
me
A or B before LE↓, CLK high
3.1 2.7 2.6 1.9
ns
A or B before LE↓, CLK low
2.6 2.0 2 1.3
t
h
Hold time
A or B after CLK↑ 2 2.1 2 2.1
ns
t
h
Hold
time
A or B after LE↓
1.3 1.2 0.9 1.2
ns
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 1)
SN54LVT16501 SN74LVT16501
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
V
CC
= 3.3 V
± 0.3 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
V
CC
= 2.7 V
UNIT
MIN MAX MIN MAX MIN TYP
†
MAX MIN MAX
f
max
150 125 150 125 MHz
t
PLH
BorA
AorB
1.7 5.4 6.8 1.7 3 5.4 6.8
ns
t
PHL
B
or
A
A
or
B
1.6 6 7.8 1.6 3.2 5.9 7.7
ns
t
PLH
LEBA or LEAB
AorB
2.3 7.3 9 2.3 4 7 8.5
ns
t
PHL
LEBA
or
LEAB
A
or
B
2.7 8.2 9.8 2.7 4.3 7.9 9.7
ns
t
PLH
CLKBA or
AorB
2.5 8.3 9.7 2.5 4.1 7.9 9.2
ns
t
PHL
CLKAB
A
or
B
3.5 9.4 10.7 3.5 5.4 8.9 10.4
ns
t
PZH
OEBA or OEAB
AorB
1.2 5.1 6.1 1.2 3 5 5.9
ns
t
PZL
OEBA
or
OEAB
A
or
B
1.5 5.9 7 1.5 3 5.8 6.9
ns
t
PHZ
OEBA or OEAB
AorB
2.7 7.5 8.5 2.7 4.6 7.4 8.3
ns
t
PLZ
OEBA
or
OEAB
A
or
B
2.8 6.8 7.5 2.8 4.7 6.7 7.2
ns
†
All typical values are at V
CC
= 3.3 V, T
A
= 25°C.
SN54LVT16501, SN74LVT16501
3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS147G – MAY 1992 – REVISED NOVEMBER 1996
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
1.5 V
t
h
t
su
From Output
Under Test
C
L
= 50 pF
(see Note A)
LOAD CIRCUIT
S1
6 V
Open
GND
500 Ω
500 Ω
Data Input
Timing Input
1.5 V
2.7 V
0 V
1.5 V 1.5 V
2.7 V
0 V
2.7 V
0 V
1.5 V 1.5 V
t
w
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
t
PLH
t
PHL
t
PHL
t
PLH
V
OH
V
OH
V
OL
V
OL
1.5 V 1.5 V
2.7 V
0 V
1.5 V1.5 V
Input
1.5 V
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
1.5 V1.5 V
3 V
0 V
1.5 V
V
OL
+ 0.3 V
1.5 V
V
OH
– 0.3 V
0 V
2.7 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open
6 V
GND
TEST S1
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z
O
= 50 Ω, t
r
≤ 2.5 ns, t
f
≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
74LVT16501DGGRE4 ACTIVE TSSOP DGG 56 2000 Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
SN74LVT16501DGGR ACTIVE TSSOP DGG 56 2000 Pb-Free
(RoHS)
CU NIPDAU Level-1-250C-UNLIM
SN74LVT16501DL ACTIVE SSOP DL 56 20 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74LVT16501DLG4 ACTIVE SSOP DL 56 20 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74LVT16501DLR ACTIVE SSOP DL 56 1000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
SN74LVT16501DLRG4 ACTIVE SSOP DL 56 1000 Green (RoHS &
no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jun-2005
Addendum-Page 1
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