SN74LVC1G14DBVR

Cross Number:

Item Description: Inverter Schmitt Trigger 1-Element CMOS 5-Pin SOT-23 T/R -
Additional Information:

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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

www.ti.com
FEATURES
3
2
4
51
NC V
CC
Y
A
GND
DBV PACKAGE
(TOP VIEW)
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
51
NC V
CC
Y
A
GND
3
2
4
51
NC
Y
A
GND
DNU
GND
V
CC
Y
A
DRL PACKAGE
(TOP VIEW)
See mechanical drawings for dimensions.
1
4
2
3
5
V
CC
DNU − Do not use
YZV PACKAGE
(BOTTOM VIEW)
GND
V
CC
Y
A
3
1
2
4
DESCRIPTION/ORDERING INFORMATION
SN74LVC1G14
SINGLE SCHMITT-TRIGGER INVERTER
SCES218S APRIL 1999 REVISED SEPTEMBER 2005
Available in the Texas Instruments I
off
Supports Partial-Power-Down Mode
NanoStar™ and NanoFree™ Packages Operation
Supports 5-V V
CC
Operation Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Inputs Accept Voltages to 5.5 V
ESD Protection Exceeds JESD 22
Max t
pd
of 4.6 ns at 3.3 V
2000-V Human-Body Model (A114-A)
Low Power Consumption, 10- µ A Max I
CC
200-V Machine Model (A115-A)
± 24-mA Output Drive at 3.3 V
1000-V Charged-Device Model (C101)
This single Schmitt-trigger inverter is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC1G14 device contains one inverter and performs the Boolean function Y = A. The device functions
as an independent inverter, but because of Schmitt action, it may have different input threshold levels for
positive-going (V
T+
) and negative-going (V
T–
) signals.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1999–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
www.ti.com
A Y
2 4
A Y
1 3
SN74LVC1G14
SINGLE SCHMITT-TRIGGER INVERTER
SCES218S APRIL 1999 REVISED SEPTEMBER 2005
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
(2)
NanoStar™ WCSP (DSBGA)
SN74LVC1G14YEAR
0.17-mm Small Bump YEA
NanoFree™ WCSP (DSBGA)
SN74LVC1G14YZAR
0.17-mm Small Bump YZA (Pb-free)
Reel of 3000 _ _ _CF_
NanoStar™ WCSP (DSBGA)
SN74LVC1G14YEPR
0.23-mm Large Bump YEP
NanoFree™ WCSP (DSBGA)
SN74LVC1G14YZPR
0.23-mm Large Bump YZP (Pb-free)
–40 ° C to 85 ° C
NanoFree™ WCSP (DSBGA) _ _ _ _
Reel of 3000 SN74LVC1G14YZVR
0.23-mm Large Bump YZV (Pb-free) CF
Reel of 3000 SN74LVC1G14DBVR
SOT (SOT-23) DBV C14_
Reel of 250 SN74LVC1G14DBVT
Reel of 3000 SN74LVC1G14DCKR
SOT (SC-70) DCK CF_
Reel of 250 SN74LVC1G14DCKT
SOT (SOT-553) DRL Reel of 4000 SN74LVC1G14DRLR CF_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YEP, YZA/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
YZV: The actual top-side marking is on two lines. Line 1 has four characters to denote year, month, day, and assembly/test site. Line 2
has two characters which show the family and function code. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
FUNCTION TABLE
INPUT OUTPUT
A Y
H L
L H
LOGIC DIAGRAM (POSITIVE LOGIC)
(DBV, DCK, DRL, YEA, YEP, YZA, and YZP Package)
LOGIC DIAGRAM (POSITIVE LOGIC)
(YZV Package)
2
www.ti.com
Absolute Maximum Ratings
(1)
Recommended Operating Conditions
(1)
SN74LVC1G14
SINGLE SCHMITT-TRIGGER INVERTER
SCES218S APRIL 1999 REVISED SEPTEMBER 2005
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range –0.5 6.5 V
V
I
Input voltage range
(2)
–0.5 6.5 V
V
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
–0.5 6.5 V
V
O
Voltage range applied to any output in the high or low state
(2) (3)
–0.5 V
CC
+ 0.5 V
I
IK
Input clamp current V
I
< 0 –50 mA
I
OK
Output clamp current V
O
< 0 –50 mA
I
O
Continuous output current ± 50 mA
Continuous current through V
CC
or GND ± 100 mA
DBV package 206
DCK package 252
DRL package 142
θ
JA
Package thermal impedance
(4)
° C/W
YEA/YZA package 154
YEP/YZP package 132
YZV package 123
T
stg
Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of V
CC
is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
MIN MAX UNIT
Operating 1.65 5.5
V
CC
Supply voltage V
Data retention only 1.5
V
I
Input voltage 0 5.5 V
V
O
Output voltage 0 V
CC
V
V
CC
= 1.65 V –4
V
CC
= 2.3 V –8
I
OH
High-level output current –16 mA
V
CC
= 3 V
–24
V
CC
= 4.5 V –32
V
CC
= 1.65 V 4
V
CC
= 2.3 V 8
I
OL
Low-level output current 16 mA
V
CC
= 3 V
24
V
CC
= 4.5 V 32
T
A
Operating free-air temperature –40 85 ° C
(1) All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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