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ZL2005PALRFT

Part # ZL2005PALRFT
Description IC REG CNTRLR BUCK PWM 36-QFN
Category IC
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Zilker Labs
Date Code: 1010
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Zilker Labs
Date Code: 1010
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Zilker Labs
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

31
FN6849.3
December 16, 2011
6.3 Output Pre-Bias Protection
An output pre-bias condition exists when an externally
applied voltage is present on a power supply’s output
before the power supply’s control IC is enabled. Cer
-
tain applications require that the converter not be
allowed to sink current during start up if a pre-bias
condition exists at the output. The ZL2005P provides
pre-bias protection by sampling the output voltage
prior to initiating an output ramp.
If a pre-bias voltage lower than the target voltage
exists after the pre-configured delay period has
expired, the target voltage is set to match the existing
pre-bias voltage and both drivers are enabled. The out
-
put voltage is then ramped to the final regulation value
at the ramp rate set by the SS (0,1) pins. The actual
time the output will take to ramp from the pre-bias
voltage to the target voltage will vary depending on
the pre-bias voltage but the total time elapsed from
when the delay period expires and when the output
reaches its target value will match the pre-configured
ramp time. See
Figure 20.
I
Figure 20. Output Response to Pre-Bias
Voltages
If the pre-bias voltage is higher than the target voltage
exists after the pre-configured delay period has
expired, the target voltage is set to match the existing
pre-bias voltage and both drivers are enabled with a
PWM duty cycle that would ideally create the pre-bias
voltage. Once the pre-configured soft-start ramp
period has expired, the Power Good pin will be
asserted (assuming the pre-bias voltage is not higher
than the overvoltage limit). The PWM will then adjust
its duty cycle to match the original target voltage and
the output will ramp down to the pre-configured out
-
put voltage.
If a pre-bias voltage higher than the overvoltage limit,
the device will not initiate a turn-on sequence and will
declare an overvoltage fault condition to exist. In this
case, the device will respond based on the output over
-
voltage fault response method that has been selected.
See
Section 6.2, “Output Overvoltage Protection,” for
response options due to an overvoltage condition.
6.4 Output Overcurrent Protection
The ZL2005P can protect the power supply from dam-
age if the output is shorted to ground or if an overload
condition is imposed on the output. Once the current
limit threshold has been selected (see
Section 5.9,
“Current Limit Threshold Selection,” ), the user may
determine the desired course of action to be taken
when an overload condition exists.
The following overcurrent protection response options
are available:
1. Initiate a shutdown and attempt to restart an infi-
nite number of times with a preset delay time.
2. Initiate a shutdown and attempt to restart the
power supply a preset number of times with a pre
-
set delay between attempts.
3. Continue operating throughout a specific delay
time, followed by shutdown.
4. Continue operating throughout the fault (this
could result in permanent damage to the power
supply).
5. Initiate an immediate shutdown.
The default response from an overcurrent fault is an
immediate shutdown of the device. The device will
continuously check for the presence of the fault condi
-
tion. If the fault condition is no longer present, the
ZL2005P will be re-enabled.
SS
Delay
SS
Ramp
Target
voltage
Pre-bias
voltage
V
OUT
Time
SS
Delay
SS
Ramp
Target
voltage
Pre-bias
voltage
V
OUT
Time
V
PREBIAS
< V
TARGET
V
PREBIAS
> V
TARGET
PG
Delay
ZL2005P
32
FN6849.3
December 16, 2011
Please refer to Application Note AN2015 for details
on how to select specific overcurrent fault response
options via the I
2
C/SMBus interface.
6.5 Thermal Protection
The ZL2005P includes an on-chip thermal sensor that
continuously measures the internal temperature of the
die and will shut down the device when the tempera
-
ture exceeds the preset limit. The default temperature
limit is set to 125°C in the factory, but the user may set
the limit to a different value if desired. See Applica
-
tion Note AN2013 for details. Note that setting a
higher thermal limit via the I
2
C/SMBus interface may
result in permanent damage to the device. Once the
device has been disabled due to an internal tempera
-
ture fault, the user may select one of several fault
response options as follows:
1. Initiate a shutdown and attempt to restart an infi-
nite number of times with a preset delay time.
2. Initiate a shutdown and attempt to restart the
power supply a preset number of times with a pre
-
set delay between attempts.
3. Continue operating throughout a specific delay
time, followed by shutdown.
4. Continue operating throughout the fault (this
could result in permanent damage to the power
supply).
5. Initiate an immediate shutdown.
If the user has configured the device to restart, the
device will wait the preset delay period (if configured
to do so) and will then check the temperature. If the
temperature has dropped below a value that is approx
-
imately 15°C lower than the selected temperature limit
(the over-temperature warning threshold), the device
will attempt to re-start. If the temperature is still
above the over-temperature warning threshold, the
device will wait the preset delay period and retry
again.
The default response from a temperature fault is an
immediate shutdown of the device. The device will
continuously check for the presence of the fault condi
-
tion. If the fault condition is no longer present, the
ZL2005P will be re-enabled.
Please refer to Application Note AN2013 for details
on how to select specific temperature fault response
options via the I
2
C/SMBus interface.
6.6 Voltage Tracking
Numerous high performance systems place stringent
demands on the order in which the power supply volt
-
ages are turned on. This is particularly true when
powering FPGAs, ASICs, and other advanced proces
-
sor devices that require multiple supply voltages to
power a single die. In most cases, the I/O operates at a
higher voltage than the Core and therefore the Core
supply voltage, must not exceed the I/O supply voltage
by some amount (typically 300 mV).
Voltage tracking protects these sensitive ICs by limit-
ing the differential voltage between multiple power
supplies during the power-up and power down
sequence. The ZL2005P integrates a lossless tracking
scheme that allows its output to track a voltage that is
applied to the VTRK pin with no external components
required. The VTRK pin is an analog input that, when
tracking mode is enabled, configures the voltage
applied to the VTRK pin to act as a reference for the
device’s output regulation.
The ZL2005P offers two modes of tracking:
1. Coincident. This mode configures the ZL2005P to
ramp its output voltage at the same rate as the volt
-
age applied to the VTRK pin.
2. Ratiometric. This mode configures the ZL2005P
to ramp its output voltage at a rate that is a per
-
centage of the voltage applied to the VTRK pin.
The default setting is 50%, but an external resistor
string may be used to configure a different track
-
ing ratio.
Figure 21 illustrates the typical connection and the two
tracking modes.
The Tracking feature is not supported for ZL2005P
devices in a current sharing group.
ZL2005P
33
FN6849.3
December 16, 2011
Figure 21. Tracking Modes
The master ZL2005P device in a tracking group is
defined as the device that has the highest target output
voltage within the group. This master device will con
-
trol the ramp rate of all tracking devices and is not
configured for tracking mode. A delay of at least 10
ms must be configured into the master device, and the
user may also configure a specific ramp rate using
PMBus.
Any device that is configured for tracking mode will
ignore its soft-start delay and ramp time settings and
its output will take on the turn-on/turn-off characteris
-
tics of the reference voltage present at the VTRK pin.
The tracking mode for all other devices can be set by
PMBus. All of the ENABLE pins in the tracking group
must be connected together and driven by a single
logic source.
Please refer to Application Note AN2013 for details
on how to configure tracking via the I
2
C/SMBus inter-
face.
6.7 Voltage Margining
The ZL2005P offers a simple means to vary its output
higher or lower than its nominal voltage setting in
order to determine whether the load device is capable
of operating over its specified supply voltage range.
The MGN pin is a TTL-compatible input that is con
-
tinuously monitored and can be driven directly by a
processor I/O pin or other logic-level output.
The ZL2005P output will be forced higher than its
nominal setpoint when the MGN pin is driven HIGH,
and the output will be forced lower than its nominal
setpoint when the MGN pin is driven LOW. When the
MGN pin is left floating (high impedance), the
ZL2005P output voltage will be set to its nominal volt
-
age setpoint determined by the V0 and V1 pins and/or
the I
2
C/SMBus settings that configure the nominal
output voltage. Default margin limits of V
NOM
±5%
are pre-loaded in the factory, but the margin limits can
be modified through the I
2
C/SMBus interface to as
high as V
NOM
+ 10% or as low as 0V, where V
NOM
is
the nominal output voltage setpoint determined by the
V0 and V1 pins.
The margin limits and the MGN command can both be
set individually through the I
2
C/SMBus interface.
Additionally, the transition rate between the nominal
output voltage and either margin limit can be config
-
ured through the I
2
C/SMBus interface. Please refer to
Application Note AN2013 for detailed instructions on
modifying the margining configurations.
6.8 I
2
C/SMBus Communications
The ZL2005P provides an I
2
C/SMBus digital interface
that enables the user to configure all aspects of the
device operation as well as monitor the input and out
-
put parameters. The ZL2005P can be used with any
standard 2-wire I
2
C host device. In addition, the
device is compatible with SMBus version 2.0 and
includes an SALRT line to help mitigate bandwidth
limitations related to continuous fault monitoring. The
ZL2005P accepts most standard PMBus commands.
V
OUT
V
OUT
Time
Coincident
Ratiometric
V
TRK
V
IN
V
OUT
Q1
Q2
L1
C1
GH
GL
SW
ZL
VTRK
V
TRK
V
OUT
V
OUT
Time
V
TRK
ZL2005P
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