ZL2005P

Digital-DC™

Controller with Drivers and POLA/DOSA Trim

Description

The ZL2005P is an innovative mixed-signal power

conversion and management IC that combines a com

pact, efficient, synchronous DC-DC buck controller,

adaptive drivers and key power and thermal manage

ment functions in one IC, providing flexibility and

scalability while decreasing board space requirements

and design complexity. Zilker Labs Digital-DC tech

nology enables a unique blend of performance and

features not available in either traditional analog or

newer digital approaches, resolving the issues associ

ated with providing multiple low-voltage power

domains on a single PCB.

The ZL2005P is designed to be configured either as a

standard ZL2005 or as POLA/DOSA compatible

device.

All operating features can be configured by simple

pin-strap selection, resistor selection or through the

on-board serial port. The PMBus™-compliant

ZL2005P uses the SMBus™ serial interface for com

munication with other Digital-DC products or a host

controller.

Features Power Conversion

• Efficient synchronous buck controller

•3 V to 14 V input range

• 0.54 V to 5.5 V output range (with margin)

• Optional output voltage setting with VADJ pin

• ± 1% output accuracy

• Internal 3 A drivers support >40 A power stage

• Fast load transient response

• Phase interleaving

• RoHS compliant (6 x 6 mm) QFN package

Power Management

• Digital soft start/stop

• Precision delay and ramp-up

• Voltage tracking, sequencing and margining

• Voltage/current/temperature monitoring

•I

C/SMBus communication

• Output overvoltage and overcurrent protection

• Internal non-voltatile memory (NVM)

• PMBus compliant

Applications

• Servers/storage equipment

• Telecom/datacom equipment

• Power supplies (memory, DSP, ASIC, FPGA)

Figure 1. Block Diagram

CURRENT

SENSE

LDO

TEMP

SENSOR

SS (0,1)

VTRK

MGN

VR VDD

BST

ISENA

ISENB

VADJ

POWER

DRIVER

XTEMP

PWM

SCL

SDA

SALRT

SA (0,1)

MANAGEMENT

PG CFG UVLO

DLY

(0,1)

ILIM

(0,1)

MONITOR

CONTROLLER

V25

SYNC

PGND SGND DGND

ADC

NON-

VOLATILE

MEMORY

VSEN

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

Data Sheet FN6849.3December 16, 2011

FN6849.3

December 16, 2011

Table of Contents

1 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3 Typical Application Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 ZL2005P Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.1 Digital-DC Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.2 ZL2005 - ZL2005P . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.3 Power Conversion Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.4 Power Management Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.5 Multi-mode Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5 Power Conversion Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1 Internal Bias Regulators and Input Supply Connections . . . . . . . . . . . . . . . . . . . . . 14

5.2 High-side Driver Boost Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.3 Output Voltage Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.4 Start-up Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.5 Soft Start Delay and Ramp Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

5.6 Power Good . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5.7 Switching Frequency and PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5.8 Selecting Power Train Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.9 Current Limit Threshold Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.10 Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.11 Non-Linear Response Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.12 Efficiency Optimized Driver Dead-time Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6 Power Management Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

6.1 Input Undervoltage Lockout (UVLO) Standard Mode . . . . . . . . . . . . . . . . . . . . . . . . 30

6.2 Output Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

6.3 Output Pre-Bias Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6.4 Output Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6.5 Thermal Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.6 Voltage Tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.7 Voltage Margining . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6.8 I

C/SMBus Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6.9 I

C/SMBus Device Address Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6.10 Phase Spreading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6.11 Output Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.12 Monitoring via I

C/SMBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

6.13 Temperature Monitoring Using the XTEMP Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

6.14 Non-volatile Memory and Device Security Features . . . . . . . . . . . . . . . . . . . . . . . . 37

7 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

8 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8.1 Related Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

8.2 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

ZL2005P

FN6849.3

December 16, 2011

1 Electrical Characteristics

Table 1. Absolute Maximum Ratings

Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may

adversely impact product reliability and result in failures not covered by warranty. Unless otherwise specified, all

voltages are measured with respect to SGND.

DC supply voltage VDD -0.3 to 17 V

Logic I/O voltage

DLY(0,1), EN, ILIM(0,1),

MGN, P

G, SA(0,1), SALRT,

SCL, SDA, SS(0,1), SYNC,

VADJ, UVLO, V(0,1)

-0.3 to 6.5 V

Analog input voltages

ISENB, VSEN, VTRK,

ISENA,

XTEMP

-0.3 to 6.5 V

MOSFET drive reference VR -0.3 to 6.5 V

Logic reference V25 -0.3 to 3 V

High-side supply voltage BST -0.3 to +30 V

High-side drive voltage GH (V

- 0.3) to (V

BST

+0.3) V

Low-side drive voltage GL (PGND-0.3) to (VR+0.3+PGND) V

Boost to switch dif

ferential voltage

BST

- V

)

BST, SW -0.3 to 8 V

Switch node continuous SW (PGND-0.3) to 30 V

Switch node transient

(<100 ns)

SW (PGND-5) to 30 V

Ground voltage differential

DGND

-V

SGND

), (V

PGND

-V

SGND

)

DGND, SGND, PGND -0.3 to +0.3 V

Junction temperature – -55 to 150

Storage temperature range – -55 to 150

Lead temperature

(soldering, 10s)

– 300

Parameter Pin(s) Value Unit

ZL2005P

Part #	ZL2005PALRFT
Description	IC REG CNTRLR BUCK PWM 36-QFN
Category	IC
Availability	In Stock
Qty	200

Qty	Price
1 - 42	$4.32646
43 - 84	$3.44150
85 - 126	$3.24484
127 - 168	$3.01541
169 +	$2.68765

Manufacturer	Available	Qty
Zilker Labs Date Code: 1010	Freelance Stock: 100 Ships Immediately
Zilker Labs Date Code: 1010	Freelance Stock: 90 Ships Immediately
Zilker Labs	Freelance Stock: 10 Ships Immediately

ZL2005PALRFT

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