
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
DS302 (v3.7) September 9, 2009 www.xilinx.com
Product Specification 31
CLB Switching Characteristics
Tabl e 37 : CLB Switching Characteristics
Symbol Description
Speed Grade
Units
-12 -11 -10
XC4VFX
(2)
XC4VLX/SX
ALL DEVICES
Combinatorial Delays
T
ILO
4-input function: F/G inputs to X/Y outputs 0.15 0.15 0.17 0.20 ns, Max
T
IF5
5-input function: F/G inputs to F5 output 0.36 0.35 0.40 0.46 ns, Max
T
IF5X
5-input function: F/G inputs to X output 0.44 0.43 0.49 0.57 ns, Max
T
IF6Y
FXINA or FXINB inputs to YMUX output 0.30 0.30 0.34 0.39 ns, Max
T
INAFX
FXINA input to FX output via MUXFX 0.21 0.21 0.23 0.27 ns, Max
T
INBFX
FXINB input to FX output via MUXFX 0.21 0.20 0.23 0.26 ns, Max
T
BXX
BX input to XMUX output 0.59 0.58 0.65 0.76 ns, Max
T
BYY
BY input to YMUX output 0.43 0.43 0.48 0.56 ns, Max
T
BXCY
BX input to C
OUT
output – Getting into carry chain
(3)
0.60 0.59 0.66 0.78 ns, Max
T
BYCY
BY input to C
OUT
output – Getting into carry chain
(3)
0.49 0.48 0.54 0.63 ns, Max
T
BYP
C
IN
input to C
OUT
output – Carry chain delay
(3)
0.07 0.07 0.08 0.09 ns, Max
T
OPCYF
F input to C
OUT
output – Getting out from carry chain
(3)
0.45 0.44 0.50 0.58 ns, Max
T
OPCYG
G input to C
OUT
output – Getting out from carry chain
(3)
0.44 0.43 0.48 0.57 ns, Max
Sequential Delays
T
CKO
FF Clock CLK to XQ/YQ outputs 0.28 0.28 0.31 0.36 ns, Max
T
CKLO
Latch Clock CLK to XQ/YQ outputs 0.37 0.36 0.41 0.48 ns, Max
Setup and Hold Times of CLB Flip-Flops Before/After Clock CLK
T
DICK
/ T
CKDI
BX/BY inputs
0.36
–0.09
0.36
–0.09
0.40
–0.09
0.47
–0.09
ns, Min
T
CECK
/ T
CKCE
CE input
0.58
–0.16
0.57
–0.16
0.64
–0.16
0.75
–0.16
ns, Min
T
FXCK
/ T
CKFX
FXINA/FXINB inputs
0.42
–0.14
0.41
–0.14
0.46
–0.14
0.54
–0.14
ns, Min
T
SRCK
/ T
CKSR
SR/BY inputs (synchronous)
1.04
–0.74
1.02
–0.73
1.15
–0.73
1.35
–0.73
ns, Min
T
CINCK
/ T
CKCIN
C
IN
Data Inputs (DI) – Getting out from carry chain
(3)
0.52
–0.23
0.51
–0.23
0.57
–0.23
0.67
–0.23
ns, Min
Set/Reset
T
RPW
Minimum Pulse Width, SR/BY inputs 0.54 0.53 0.59 0.70 ns, Min
T
RQ
Delay from SR/BY inputs to XQ/YQ outputs
(asynchronous)
1.05 1.03 1.15 1.35 ns, Max
F
TOG
Toggle Frequency (MHz) (for export control) 1181 1205 1205
(4)
1028 MHz
Notes:
1. A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values cannot be guaranteed “best-case,” but if a “0” is listed,
there is no positive hold time.
2. The values in this column apply to all XC4VFX -12 parts except XC4VFX12 -12. For XC4VFX12 -12 values, use the values in the adjacent 4VLX/SX
-12 column.
3. These items are of interest for Carry Chain applications.
4. XC4VFX -11 devices are 1181 MHz.