VCA810
SBOS275F –JUNE 2003–REVISED DECEMBER 2010
www.ti.com
THERMAL ANALYSIS reduce unwanted capacitance, a window around the
signal I/O pins should be opened in all of the ground
The VCA810 will not require heatsinking or airflow in
and power planes around those pins. Otherwise,
most applications. Maximum desired junction
ground and power planes should be unbroken
temperature would set the maximum allowed internal
elsewhere on the board. Place a small series
power dissipation as described in this section. In no
resistance (> 25Ω) with the input pin connected to
case should the maximum junction temperature be
ground to help decouple package parasitic.
allowed to exceed +150°C.
b) Minimize the distance (less than 0.25” or
Operating junction temperature (T
J
) is given by
6.35mm) from the power-supply pins to
Equation 10:
high-frequency 0.1mF decoupling capacitors. At the
device pins, the ground and power plane layout
(10)
should not be in close proximity to the signal I/O pins.
The total internal power dissipation (P
D
) is the sum of
Avoid narrow power and ground traces to minimize
quiescent power (P
DQ
) and additional power
inductance between the pins and the decoupling
dissipated in the output stage (P
DL
) to deliver load
capacitors. The power-supply connections should
power. Quiescent power is simply the specified
always be decoupled with these capacitors. Larger
no-load supply current times the total supply voltage
(2.2mF to 6.8mF) decoupling capacitors, effective at
across the part. P
DL
depends on the required output
lower frequencies, should also be used on the main
signal and load; for a grounded resistive load,
supply pins. These capacitors may be placed
however, it is at a maximum when the output is fixed
somewhat farther from the device and may be shared
at a voltage equal to one-half of either supply voltage
among several devices in the same area of the PCB.
(for equal bipolar supplies). Under this worst-case
c) Careful selection and placement of external
condition, P
DL
= V
S
.
2
/(4 ● R
L
), where R
L
is the
components will preserve the high-frequency
resistive load.
performance of the VCA810. Resistors should be a
Note that it is the power in the output stage and not in
very low reactance type. Surface-mount resistors
the load that determines internal power dissipation.
work best and allow a tighter overall layout. Metal-film
As a worst-case example, compute the maximum T
J
and carbon composition, axially-leaded resistors can
using an VCA810ID (SO-8 package) in the circuit of
also provide good high-frequency performance.
Figure 30 operating at maximum gain and at the
Again, keep the leads and PCB trace length as short
maximum specified ambient temperature of +85°C.
as possible. Never use wire-wound type resistors in a
high-frequency application. Since the output pin is the
P
D
= 10V(24.8mA) + 5
2
/(4 ● 500Ω) = 260.5mW
most sensitive to parasitic capacitance, always
Maximum T
J
= +85°C + (0.260W ● +125°C/W)
position the series output resistor, if any, as close as
= 117.6°C
possible to the output pin. Other network
This maximum operating junction temperature is well
components, such as inverting or noninverting input
below most system level targets. Most applications
termination resistors, should also be placed close to
will be lower since an absolute worst-case output
the package.
stage power was assumed in this calculation of V
S
/2
d) Connections to other wideband devices on the
which is beyond the output voltage range for the
board may be made with short direct traces or
VCA810.
through onboard transmission lines. For short
connections, consider the trace and the input to the
BOARD LAYOUT
next device as a lumped capacitive load. Relatively
wide traces (50mils to 100mils, or 1.27mm to
Achieving optimum performance with a
2.54mm) should be used, preferably with ground and
high-frequency amplifier such as the VCA810
power planes opened up around them.
requires careful attention to board layout parasitic and
external component types. Recommendations that
e) Socketing a high-speed part like the VCA810 is
will optimize performance include:
not recommended. The additional lead length and
pin-to-pin capacitance introduced by the socket can
a) Minimize parasitic capacitance to any ac ground
create an extremely troublesome parasitic network,
for all of the signal I/O pins. This includes the ground
which can make it almost impossible to achieve a
pin (pin 2). Parasitic capacitance on the output can
smooth, stable frequency response. Best results are
cause instability: on both the inverting input and the
obtained by soldering the VCA810 onto the board.
noninverting input, it can react with the source
impedance to cause unintentional band limiting. To
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