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TUSB3200ACPAH

Part # TUSB3200ACPAH
Description USB STREAMING CONTROLLER
Category IC
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Technical Document


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A–7
Table A–1. USB Endpoint Configuration Blocks Address Map (Continued)
ADDRESS MNEMONIC NAME
FF4Fh IEPDCNTY4 In endpoint 4 - Y buffer data count byte
FF4Eh Reserved Reserved for future use.
FF4Dh IEPBBAY4 In endpoint 4 - Y buffer base address byte
FF4Ch Reserved Reserved for future use.
FF4Bh IEPDCNTX4 In endpoint 4 - X buffer data count byte
FF4Ah IEPBSIZ4 In endpoint 4 - X and Y buffer size byte
FF49h IEPBBAX4 In endpoint 4 - X buffer base address byte
FF48h IEPCNF4 In endpoint 4 – configuration byte
FF47h IEPDCNTY5 In endpoint 5 - Y buffer data count byte
FF46h Reserved Reserved for future use.
FF45h IEPBBAY5 In endpoint 5 - Y buffer base address byte
FF44h Reserved Reserved for future use.
FF43h IEPDCNTX5 In endpoint 5 - X buffer data count byte
FF42h IEPBSIZ5 In endpoint 5 - X and Y buffer size byte
FF41h IEPBBAX5 In endpoint 5 - X buffer base address byte
FF40h IEPCNF5 In eEndpoint 5 – configuration byte
FF3Fh IEPDCNTY6 In endpoint 6 - Y buffer data count byte
FF3Eh Reserved Reserved for future use.
FF3Dh IEPBBAY6 In endpoint 6 - Y buffer base address byte
FF3Ch Reserved Reserved for future use.
FF3Bh IEPDCNTX6 In endpoint 6 - X buffer data count byte
FF3Ah IEPBSIZ6 In endpoint 6 - X and Y buffer size byte
FF39h IEPBBAX6 In endpoint 6 - X buffer base address byte
FF38h IEPCNF6 In endpoint 6 – configuration byte
FF37h IEPDCNTY7 In endpoint 7 - Y buffer data count byte
FF36h Reserved Reserved for future use.
FF35h IEPBBAY7 In endpoint 7 - Y buffer base address byte
FF34h Reserved Reserved for future use.
FF33h IEPDCNTX7 In endpoint 7 - X buffer data count byte
FF32h IEPBSIZ7 In endpoint 7 - X and Y buffer size byte
FF31h IEPBBAX7 In endpoint 7 - X buffer base address byte
FF30h IEPCNF7 In endpoint 7 – configuration byte
A–8
A.4.3 USB Out Endpoint Configuration Bytes
This section describes the individual bytes in the USB endpoint configuration blocks for the out endpoints. A set of
8 bytes is used for the control and operation of each USB out endpoint. In addition to the USB control endpoint, the
TUSB3200 supports up to a total of seven out endpoints.
A.4.3.1 USB Out Endpoint – Y Buffer Data Count Byte (OEPDCNTYx)
The USB out endpoint Y buffer data count byte contains the 7-bit value used to specify the amount of data received
in a data packet from the host PC. The no acknowledge status bit is also contained in this byte.
Bit 7 6 5 4 3 2 1 0
Mnemonic NACK DCNTY6 DCNTY5 DCNTY4 DCNTY3 DCNTY2 DCNTY1 DCNTY0
Type R/W R/W R/W R/W R/W R/W R/W R/W
BIT MNEMONIC NAME DESCRIPTION
7 NACK No acknowledge The no acknowledge status bit is set to a 1 by the UBM at the end of a successful USB out
transaction to this endpoint to indicate that the USB endpoint Y buffer contains a valid data
packet and that the Y buffer data count value is valid. For control, interrupt, or bulk end-
points, when this bit is set to a 1, all subsequent transactions to the endpoint will result in a
NACK handshake response to the host PC. Also for control, interrupt, and bulk endpoints,
to enable this endpoint to receive another data packet from the host PC, this bit must be
cleared to a 0 by the MCU. For isochronous endpoints, a NACK handshake response to the
host PC is not allowed. Therefore, the UBM ignores this bit in reference to receiving the next
data packet. However, the MCU or DMA should clear this bit before reading the data packet
from the buffer.
6:0 DCNTY(6:0) Y Buffer data count The Y buffer data count value is set by the UBM when a new data packet is written to the Y
buffer for the out endpoint. The 7-bit value is set to the number of bytes in the data packet for
control, interrupt or bulk endpoint transfers and is set to the number of samples in the data
packet for isochronous endpoint transfers. To determine the number of samples in the data
packet for isochronous transfers, the bytes per sample value in the configuration byte is
used. The data count value is read by the MCU or DMA to obtain the data packet size.
A.4.3.2 USB Out Endpoint – Y Buffer Base Address Byte (OEPBBAYx)
The USB out endpoint Y buffer base address byte contains the 8-bit value used to specify the base memory location
for the Y data buffer for a particular USB out endpoint.
Bit 7 6 5 4 3 2 1 0
Mnemonic BBAY10 BBAY9 BBAY8 BBAY7 BBAY6 BBAY5 BBAY4 BBAY3
Type R/W R/W R/W R/W R/W R/W R/W R/W
BIT MNEMONIC NAME DESCRIPTION
7:0 BBAY(10:3) Y Buffer base address The Y buffer base address value is set by the MCU to program the base address
location in memory to be used for the Y data buffer. A total of 11 bits is used to specify
the base address location. This byte specifies the most significant 8 bits of the
address. All 0s are used by the hardware for the three least significant bits.
A–9
A.4.3.3 USB Out Endpoint – X Buffer Data Count Byte (OEPDCNTXx)
The USB out endpoint X buffer data count byte contains the 7-bit value used to specify the amount of data received
in a data packet from the host PC. The no acknowledge status bit is also contained in this byte.
Bit 7 6 5 4 3 2 1 0
Mnemonic NACK DCNTX6 DCNTX5 DCNTX4 DCNTX3 DCNTX2 DCNTX1 DCNTX0
Type R/W R/W R/W R/W R/W R/W R/W R/W
BIT MNEMONIC NAME DESCRIPTION
7 NACK No acknowledge The no acknowledge status bit is set to a 1 by the UBM at the end of a successful
USB out transaction to this endpoint to indicate that the USB endpoint X buffer
contains a valid data packet and that the X buffer data count value is valid. For
control, interrupt, or bulk endpoints, when this bit is set to a 1, all subsequent
transactions to the endpoint will result in a NACK handshake response to the host
PC. Also for control, interrupt, and bulk endpoints, to enable this endpoint to receive
another data packet from the host PC, this bit must be cleared to a 0 by the MCU. For
isochronous endpoints, a NACK handshake response to the host PC is not allowed.
Therefore, the UBM ignores this bit in reference to receiving the next data packet.
However, the MCU or DMA should clear this bit before reading the data packet from
the buffer.
6:0 DCNTX(6:0) X Buffer data count The X buffer data count value is set by the UBM when a new data packet is written to
the X buffer for the out endpoint. The 7-bit value is set to the number of bytes in the
data packet for control, interrupt, or bulk endpoint transfers and is set to the number
of samples in the data packet for isochronous endpoint transfers. To determine the
number of samples in the data packet for isochronous transfers, the bytes per
sample value in the configuration byte is used. The data count value is read by the
MCU or DMA to obtain the data packet size.
A.4.3.4 USB Out Endpoint – X and Y Buffer Size Byte (OEPBSIZx)
The USB out endpoint X and Y buffer size byte contains the 8-bit value used to specify the size of the two data buffers
to be used for this endpoint.
Bit 7 6 5 4 3 2 1 0
Mnemonic BSIZ7 BSIZ6 BSIZ5 BSIZ4 BSIZ3 BSIZ2 BSIZ1 BSIZ0
Type R/W R/W R/W R/W R/W R/W R/W R/W
BIT MNEMONIC NAME DESCRIPTION
7:0 BSIZ(7:0) Buffer size The X and Y buffer size value is set by the MCU to program the size of the X and Y
data packet buffers. Both buffers are programmed to the same size based on this
value. This value should be in 8 byte units. For example, a value of 18h would result
in the size of the X and Y buffers each being set to 192 bytes.
A.4.3.5 USB Out Endpoint – X Buffer Base Address Byte (OEPBBAXx)
The USB out endpoint X buffer base address byte contains the 8-bit value used to specify the base memory location
for the X data buffer for a particular USB out endpoint.
Bit 7 6 5 4 3 2 1 0
Mnemonic BBAX10 BBAX9 BBAX8 BBAX7 BBAX6 BBAX5 BBAX4 BBAX3
Type R/W R/W R/W R/W R/W R/W R/W R/W
BIT MNEMONIC NAME DESCRIPTION
7:0 BBAX(10:3) X Buffer base address The X buffer base address value is set by the MCU to program the base address
location in memory to be used for the X data buffer. A total of 11 bits is used to specify
the base address location. This byte specifies the most significant 8 bits of the
address. All 0s are used by the hardware for the three least significant bits.
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