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TMS320VC5509APGE

Part # TMS320VC5509APGE
Description FIXED POINT DIGITAL SIGNAL PROCESSOR -DSP, 32 BIT, 200MHZ
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Functional Overview
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November 2002 − Revised January 2005SPRS205D
3.11.2 Interrupt Timing
The external interrupts (INT[4:0]) are synchronized to the CPU by way of a two-flip-flop synchronizer. The
interrupt inputs are sampled on falling edges of the CPU clock. A sequence of 1-1-0-0-0 on consecutive cycles
on the interrupt pin is required for an interrupt to be detected. Therefore, the minimum low pulse duration on
the external interrupts on the 5509A is three CPU clock periods.
3.11.3 Waking Up From IDLE Condition
One of the following four events can wake up the CPU from IDLE:
Hardware Reset
External Interrupt
RTC Interrupt
USB Event (Reset or Resume)
3.11.3.1 Waking Up From IDLE With Oscillator Disabled
With an external interrupt, a RTC interrupt, or an USB resume/reset, the clock generation circuit wakes up the
oscillator and enables the USB PLL to determine the oscillator stable time. In the case of the interrupt being
disabled by clearing the associated bit in the Interrupt Enable Register (IERx), the CPU is not “woken up”. If
the interrupt due to the wake-up event is enabled, the interrupt is sent to the CPU only after the oscillator is
stabilized and the USB PLL is locked. If the external interrupt serves as the wake-up event, the interrupt line
must stay low for a minimum of 3 CPU cycles after the oscillator is stabilized to wake up the CPU. Otherwise,
only the clock domain will wake up and another external interrupt will be needed to wake up the CPU.
Once out of IDLE, any system not using the USB should put the USB module in idle mode to reduce power
consumption.
For more details on the TMS320VC5509A oscillator-disable process, see the Disabling the Internal Oscillator
on the TMS320VC5507/5509/5509A DSP Application Report (literature number SPRA078).
3.11.4 Idling Clock Domain When External Parallel Bus Operating in EHPI Mode
The clock domain cannot be idled when the External Parallel Bus is operating in EHPI mode to ensure host
access to the DSP memory. To work around this restriction, use the HIDL bit of the External Bus Selection
Register (EBSR) with the CLKGENI bit of the Idle Control Register (ICR) to idle the clock domain.
Support
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November 2002 − Revised January 2005 SPRS205D
4 Support
4.1 Notices Concerning JTAG (IEEE 1149.1) Boundary Scan Test Capability
4.1.1 Initialization Requirements for Boundary Scan Test
The TMS320VC5509A uses the JTAG port for boundary scan tests, emulation capability and factory test
purposes. To use boundary scan test, the EMU0 and EMU1/OFF pins must be held HIGH through a rising edge
of the TRST signal prior to the first scan. This operation selects the appropriate TAP control for boundary scan.
If at any time during a boundary scan test a rising edge of TRST occurs when EMU0 or EMU1/OFF are not
high, a factory test mode may be selected preventing boundary scan test from being completed. For this
reason, it is recommended that EMU0 and EMU1/OFF be pulled or driven high at all times during boundary
scan test.
4.1.2 Boundary Scan Description Language (BSDL) Model
BSDL models are available on the web in the TMS320VC5509A product folder under the “simulation models”
section.
4.2 Documentation Support
Extensive documentation supports all TMS320 DSP family of devices from product announcement through
applications development. The following types of documentation are available to support the design and use
of the TMS320C5000 platform of DSPs:
TMS320C55x DSP Functional Overview (literature number SPRU312)
Device-specific data sheets and data manuals
Complete user’s guides
Development support tools
Hardware and software application reports
TMS320C55x reference documentation includes, but is not limited to, the following:
TMS320C55x DSP CPU Reference Guide (literature number SPRU371)
TMS320C55x DSP Mnemonic Instruction Set Reference Guide (literature number SPRU374)
TMS320C55x DSP Algebraic Instruction Set Reference Guide (literature number SPRU375)
TMS320C55x DSP Programmer’s Guide (literature number SPRU376)
TMS320C55x DSP Peripherals Overview Reference Guide (literature number SPRU317)
TMS320C55x Optimizing C/C++ Compiler User’s Guide (literature number SPRU281)
TMS320C55x Assembly Language Tools Users Guide (literature number SPRU280)
TMS320C55x DSP Library Programmer’s Reference (literature number SPRU422)
TMS320VC5507/5509 DSP Universal Serial Bus (USB) Module Reference Guide (literature number
SPRU596)
TMS320C55x Hardware Extensions for Image/Video Applications Programmer’s Reference (literature
number SPRU098)
TMS320C55x Image/Video Processing Library Programmer’s Reference (literature number SPRU037)
Using the USB APLL on the TMS320VC5507/5509A Application Report (literature number SPRA997)
Disabling the Internal Oscillator on the TMS320VC5507/5509/5509A DSP Application Report (literature
number SPRA078)
Using the TMS320VC5503/VC5507/VC5509/VC5509A Bootloader Application Report (literature
number SPRA375)
TMS320VC5509A Power Consumption Summary Application Report (literature number SPRAA04)
TMS320VC5509A Digital Signal Processor Silicon Errata (literature number SPRZ200)
TMS320 and TMS320C5000 are trademarks of Texas Instruments.
Support
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November 2002 − Revised January 2005SPRS205D
The reference guides describe in detail the TMS320C55x DSP products currently available and the
hardware and software applications, including algorithms, for fixed-point TMS320 DSP family of devices.
A series of DSP textbooks is published by Prentice-Hall and John Wiley & Sons to support digital signal
processing research and education. The TMS320 DSP newsletter, Details on Signal Processing, is
published quarterly and distributed to update TMS320 DSP customers on product information.
Information regarding TI DSP products is also available on the Worldwide Web at http://www.ti.com uniform
resource locator (URL).
4.3 Device and Development-Support Tool Nomenclature
To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all DSP
devices and support tools. Each DSP commercial family member has one of three prefixes: TMX, TMP, or TMS
(e.g., TMS320C6412GDK600). Texas Instruments recommends two of three possible prefix designators for
its support tools: TMDX and TMDS. These prefixes represent evolutionary stages of product development
from engineering prototypes (TMX/TMDX) through fully qualified production devices/tools (TMS/TMDS).
Device development evolutionary flow:
TMX Experimental device that is not necessarily representative of the final device’s electrical specifications
TMP Final silicon die that conforms to the device’s electrical specifications but has not completed quality
and reliability verification
TMS Fully qualified production device
Support tool development evolutionary flow:
TMDX Development-support product that has not yet completed Texas Instruments internal qualification
testing.
TMDS Fully qualified development-support product
TMX and TMP devices and TMDX development-support tools are shipped against the following disclaimer:
“Developmental product is intended for internal evaluation purposes.”
TMS devices and TMDS development-support tools have been characterized fully, and the quality and
reliability of the device have been demonstrated fully. TI’s standard warranty applies.
Predictions show that prototype devices (TMX or TMP) have a greater failure rate than the standard
production devices. Texas Instruments recommends that these devices not be used in any production system
because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.
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