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TL032CP

Part # TL032CP
Description OP Amp Dual GP ±15V 8-Pin PDIP Tube - Rail/Tube
Category IC
Availability In Stock
Qty 34
Qty Price
1 + $0.16024
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Texas Instruments
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL032M and TL032AM electrical characteristics at specified free-air temperature
TL032M, TL032AM
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V UNIT
A
MIN TYP MAX MIN TYP MAX
25°C 0.69 3.5 0.57 1.5
V
IO
In
p
ut offset voltage
V
O
= 0,
V
IC
0
Full range
†
6.5 4.5
mV
V
IO
Input
offset
voltage
V
IC
=
0
,
R
S
=
50
Ω
25°C 0.53 2.8 0.39 0.8
mV
R
S
=
50
Ω
Full range
†
5.8 3.8
Temperature coefficient
V
O
= 0,
V
IC
0
TL032M
25°C to
125°C
9.7 9.7
µV/°C
V
IO
of input offset voltage
V
IC
=
0
,
R
S
= 50 Ω
TL032AM
25°C to
125°C
9.7 9.7
µ
V/°C
Input offset voltage
long-term drift
‡
V
O
= 0,
V
IC
= 0,
R
S
= 50 Ω
25°C 0.04 0.04 µV/mo
I
IO
In
p
ut offset current
V
O
= 0, V
= 0
25°C 1 100 1 100 pA
I
IO
Input
offset
current
O
,
See Figure 5
125°C 0.2 10 0.2 10 nA
I
IB
In
p
ut bias current
V
O
= 0, V
= 0
25°C 2 200 2 200 pA
I
IB
Input
bias
current
O
,
See Figure 5
125°C 7 20 8 20 nA
V
ICR
Common-mode input
25°C
–1.5
to 4
–3.4
to 5.4
–11.5
to 14
–13.4
to 15.4
V
V
ICR
voltage range
Full range
†
–1.5
to 4
–11.5
to 14
V
M i iti k
25°C 3 4.3 13 14
V
OM+
Maximum positive peak
out
p
ut voltage swing
R
L
= 10 kΩ
–55°C 3 4.1 13 14
V
out ut
voltage
swing
125°C 3 4.4 13 14
M i ti k
25°C –3 –4.2 –12.5 –13.9
V
OM–
Maximum negative peak
out
p
ut voltage swing
R
L
= 10 kΩ
–55°C –3 –4 –12.5 –13.8
V
out ut
voltage
swing
125°C –3 –4.3 –12.5 –14
L i l diff ti l
25°C 4 12 5 14.3
A
VD
Large-signal differential
voltage am
p
lification
§
R
L
= 10 kΩ
–55°C 3 7.1 4 10.4
V/mV
voltage
am lification
§
125°C 3 12.9 4 15
r
i
Input resistance 25°C 10
12
10
12
Ω
c
i
Input capacitance 25°C 5 4 pF
Cdjti
VV i
25°C 70 87 75 94
CMRR
Common-mode rejection
ratio
V
IC
= V
ICR
min,
V
O
=0 R
S
=50Ω
–55°C 70 87 70 94
dB
ratio
V
O
=
0
,
R
S
=
50
Ω
125°C 70 87 70 94
Suppl
y
-volta
g
e
V ±5Vto±15 V
25°C 75 96 75 96
k
SVR
Su ly voltage
rejection ratio
( V / V)
V
CC±
=
±5
V
t
o
±15
V
,
V
O
=
0, R
S
=
50 Ω
–55°C 75 95 75 95
dB
(∆V
CC±
/∆V
IO
)
V
O
=
0
,
R
S
=
50
Ω
125°C 75 96 75 96
†
Full range is –55°C to 125°C.
‡
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T
A
= 150°C extrapolated to
T
A
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§
At V
CC±
= ±5 V, V
O
= 2.3 V; at V
CC±
= ±15 V, V
O
= ±10 V
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL032M and TL032AM electrical characteristics at specified free-air temperature (continued)
TL032M, TL032AM
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V UNIT
A
MIN TYP MAX MIN TYP MAX
Total
p
ower dissi
p
ation
25°C 3.8 5 13 17
P
D
Total
ower
dissi ation
(two amplifiers)
V
O
= 0, No load
–55°C
2.3 5 9.4 17
mW
V
O
= 0,
125°C 3.6 5 11.8 17
Sl t
25°C 384 500 434 560
I
CC
Supply current
(two am
p
lifiers)
V
O
= 0, No load
–55°C
228 500 312 560
µA
(two
am lifiers)
125°C 356 500 394 560
V
O1
/V
O2
Crosstalk attenuation A
VD
= 100 dB 25°C 120 120 dB
TL032M and TL032AM operating characteristics at specified free-air temperature
TL032M, TL032AM
PARAMETER TEST CONDITIONS T
A
V
CC±
= ±5 V V
CC±
= ±15 V UNIT
MIN TYP MAX MIN TYP MAX
P iti l t t it
R10kΩ C 100 F
25°C 2 1.5 2.9
SR+
Positive slew rate at unity
gain
†
R
L
= 10 kΩ, C
L
= 100 pF
See and Figure 1
–55°C 1.4 1 1.9
V/µs
gain
†
See
and
Figure
1
125°C 2.4 1 3.5
N ti l ttit
R10kΩ C 100 F
25°C 3.9 1.5 5.1
SR–
Negative slew rate at unity
gain
†
R
L
= 10 kΩ, C
L
= 100 pF
See and Figure 1
–55°C 3.2 1 4.6
V/µs
gain
†
See
and
Figure
1
125°C 4.1 1 4.7
V
I(PP)
=
±10 V,
25°C 138 132
t
r
Rise time
V
I(PP)
=
±10
V
,
R
L
= 10 kΩ, C
L
= 100 pF
–55°C 142 123
ns
See Figures 1 and 2
125°C 166 58
V
I(PP)
=
±10 V,
25°C 138 132
t
f
Fall time
V
I(PP)
=
±10
V
,
R
L
= 10 kΩ, C
L
= 100 pF
–55°C 142 123
ns
See Figure 1
125°C 166 158
V
I(PP)
=
±10 V,
25°C 11% 5%
Overshoot factor
V
I(PP)
=
±10
V
,
R
L
= 10 kΩ, C
L
= 100 pF
–55°C 16% 6%
See Figures 1 and 2
125°C 14% 8%
f = 10 Hz
25°C
49 49
√
V
Equivalent
in
p
ut noise
R
S
= 20 Ω
f = 1 kHz
25°C
41 41
nV/√Hz
V
n
i
npu
t
no
i
se
v
o
lt
age
S
See Figure 3
f = 10 Hz
25°C
49 49
n
V/√H
z
voltage
f = 1 kHz
25°C
41 41
I
n
Equivalent input noise
current
f = 1 kHz 25°C 0.003 0.003
pA/√Hz
V
I
=
10 mV,
25°C 1 1.1
B1 Unity-gain bandwidth
V
I
=
10
mV
,
R
L
= 10 kΩ, C
L
= 25 pF
–55°C 1 1.1
MHz
See Figure 4
125°C 0.9 0.9
V
I
= 10 mV
,
25°C 61° 65°
φ
m
Phase margin at unity gain
V
I
10
mV,
R
L
= 10 kΩ, C
L
= 25 pF
SFi
–55°C 57° 64°
See Figure 4
125°C 59° 62°
†
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL034C and TL034AC electrical characteristics at specified free-air temperature
TL034C, TL034AC
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V UNIT
A
MIN TYP MAX MIN TYP MAX
TL034C
25°C 0.91 6 0.79 4
V
IO
In
p
ut offset voltage
V
O
= 0,
V
IC
0
TL034C
Full range
†
8.2 6.2
mV
V
IO
Input
offset
voltage
V
IC
=
0
,
R
S
=
50
Ω
TL034AC
25°C 0.7 3.5 0.58 1.5
mV
R
S
=
50
Ω
TL034AC
Full range
†
5.7 3.7
Temperature coefficient
V
O
= 0,
V
IC
0
TL034C
25°C to
70°C
11.6 12
µV/°C
V
IO
of input offset voltage
V
IC
=
0
,
R
S
= 50 Ω
TL034AC
25°C to
70°C
11.6 12 25
µ
V/°C
Input offset voltage
long-term drift
‡
V
O
= 0,
V
IC
= 0,
R
S
= 50 Ω
25°C 0.04 0.04 µV/mo
I
IO
In
p
ut offset current
V
O
= 0, V
IC
= 0
25°C 1 100 1 100
p
A
I
IO
Input
offset
current
O
,
IC
See Figure 5
70°C 9 200 12 200
pA
I
IB
In
p
ut bias current
V
O
= 0, V
IC
= 0
25°C 2 200 2 200
p
A
I
IB
Input
bias
current
O
,
IC
See Figure 5
70°C 50 400 80 400
pA
V
ICR
Common-mode input
25°C
–1.5
to 4
–3.4
to 5.4
–11.5
to 14
–13.4
to 15.4
V
V
ICR
voltage range
Full range
†
–1.5
to 4
–11.5
to 14
V
M i iti k
25°C 3 4.3 13 14
V
OM+
Maximum positive peak
out
p
ut voltage swing
R
L
= 10 kΩ
0°C 3 4.2 13 14
V
out ut
voltage
swing
70°C 3 4.3 13 14
M i ti k
25°C –3 –4.2 –12.5 –13.9
V
OM–
Maximum negative peak
out
p
ut voltage swing
R
L
= 10 kΩ
0°C –3 –4.1 –12.5 –13.9
V
out ut
voltage
swing
70°C –3 –4.2 –12.5 –14
L i l diff ti l
25°C 4 12 5 14.3
A
VD
Large-signal differential
voltage am
p
lification
§
R
L
= 10 kΩ
0°C 3 11.1 4 13.5
V/mV
voltage
am lification
§
70°C 4 13.3 5 15.2
r
i
Input resistance 25°C 10
12
10
12
Ω
c
i
Input capacitance 25°C 5 14 pF
Cd
V
IC
=
V
ICR
min,
25°C 70 87 75 94
CMRR
Common-mode
rejection ratio
V
IC
=
V
ICR
min
,
V
O
= 0,
0°C 70 87 75 94
dB
rejection
ratio
R
S
= 50 Ω
70°C 70 87 75 94
Suppl
y
-volta
g
e
25°C 75 96 75 96
k
SVR
Su ly voltage
rejection ratio
( V / V)
V
O
= 0, R
S
= 50 Ω
0°C 75 96 75 96
dB
(∆V
CC±
/∆V
IO
)
70°C 75 96 75 96
†
Full range is 0°C to 70°C.
‡
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T
A
= 150°C extrapolated to
T
A
= 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§
At V
CC±
= ±5 V, V
O
= ±2.3 V; at V
CC±
= ±15 V, V
O
= ±10 V
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