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TE28F800C3BA90

Part # TE28F800C3BA90
Description NOR, Flash 512K x 16 48PinTSSOP
Category IC
Availability In Stock
Qty 375
Qty Price
1 - 78 $0.87249
79 - 157 $0.69403
158 - 236 $0.65437
237 - 315 $0.60810
316 + $0.54200
Manufacturer Available Qty
INTEL
Date Code: 0015
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INTEL
Date Code: 0309
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INTEL
Date Code: 0013
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Date Code: 0312
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Intel
£
Advanced+ Boot Block Flash Memory (C3)
52 Datasheet
Appendix B Flow Charts
Figure 13. Word Program Flowchart
Program
Suspend
Loop
Start
Write 0x40,
Wor d Addr ess
Write Data,
Wor d Addr ess
Read Status
Register
SR[7] =
Full Status
Check
(i f desi red)
Program
Complete
Suspend?
1
0
No
Yes
WORD PROGRAM PROCEDURE
Repeat for subsequent Word Pr ogram operations.
Full Status Register check can be done after each program, or
after a sequence of program operati ons.
Write 0xFF after the last operation to set to the Read Arr ay
state.
Comments
Bus
Operation
Command
Data = 0x40
Addr = Location to pr ogram
Wr i te
Program
Setup
Data = Data to program
Addr = Location to pr ogram
Wr i te Data
Status register data: Toggle CE# or
OE# to update Status Register
Read None
Check SR[7]
1 = WSM Ready
0= WSMBusy
Idle None
(Setup)
(Confirm)
FULL STATUS CHECK PROCEDURE
Read Status
Register
Program
Successful
SR[3] =
SR[1] =
0
0
SR[4] =
0
1
1
1 V
PP
Range
Error
Device
Protect Error
Program
Error
SR[3] MUST be cl eared before the Write State Machine will
allow further program attempts.
If an er ror is detected, clear the Status Register before
continuing operations - only the Clear Staus Register
com mand cl ears the Status R egister error bits.
Idle
Idle
Bus
Operation
None
None
Command
Check SR[3]:
1= V
PP
Error
Check SR[4]:
1= DataProgramError
Comments
Idle None
Check SR[1]:
1 = Block locked; operation aborted
Intel
£
Advanced+ Boot Block Flash Memory (C3)
Datasheet 53
Figure 14. Program Suspend / Resume Flowchart
Read Status
Register
SR[7] =
SR[2] =
ReadArray
Data
Program
Completed
Done
Reading
Program
Resumed
Read Ar r ay
Data
0
No
0
Yes
1
1
PROGRAM SUSPEND / RESUME PROCEDURE
Wr i te
Pr ogram
Resume
Data = 0xD0
Addr = Any address
Bus
Operation
Command Comments
Wr i te
Pr ogram
Suspend
Data = 0xB0
Addr = Any address
Idle None
Check SR[7]:
1 = WSM ready
0= WSMbusy
Idle None
Check SR[2]:
1 = Pr ogr am suspended
0 = Pr ogr am com pleted
Wr i te
Read
Array
Data = 0xFF
Addr = Any address
Read None
Read ar ray data from bl ock other than
the one being programmed
Read None
Status register data
Toggle CE# or OE# to update Status
regi ster
Addr = Any address
Wr i te 0xFF
(Read Array)
Wr i te 0xD 0
Any Address
(Program Resume)
Wr i te 0xFF
(Read
Array)
Wr i te
Read
Status
Data = 0x70
Addr = Any address
Start
Wr i te 0xB0
Any Address
(Program Suspend)
Wr i te 0x70
Any Address
(Read Status)
Intel
£
Advanced+ Boot Block Flash Memory (C3)
54 Datasheet
Figure 15. Erase Suspend / Resume Flowchart
Erase
Completed
Read Array
Data
0
0
1
1
Start
Read Status
Register
SR[7] =
SR[6] =
Erase
Resumed
Done
Reading
Write
Write
Idle
Idle
Write
Erase
Suspend
Read Arr ay
or Progr am
None
None
Progr am
Resume
Data = 0xB0
Addr = Any address
Data = 0xFF or 0x40
Addr = Any address
Check SR [7]:
1 = WSM r eady
0 = WSM busy
Check SR [6]:
1 = Erase suspended
0 = Erase com pleted
Data = 0xD0
Addr = Any address
Bus
Operation
Command Comments
Read None
Status Register data. Toggle CE# or
OE# to update Status register;
Addr = Any Addr ess
Read or
Write
None
Read arr ay or program data fr om /to
block other than the one being erased
ERASE SUSPEND / RESUME PROCEDURE
Write 0x70,
Any Addr ess
(Read Status)
Write 0xB0,
Any Addr ess
(Erase Suspend)
Write 0xD 0,
Any Addr ess
(E ra se Re sum e)
Write 0xFF
(Read A rray)
Write
Read
Status
Data = 0x70
Addr = Any address
Read Array
Data
Wr ite 0xFF
0
(Read Array)
1
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