Intel
£
Advanced+ Boot Block Flash Memory (C3)
42 Datasheet
Table 16. Read Operations — 64 Mbit Density
#Sym Parameter
Density 64 Mbit
Unit
Product 70 ns 80 ns
V
CC
2.7 V–3.6 V 2.7 V–3.6 V
Note Min Max Min Max
R1 t
AVAV
Read Cycle Time 3,4 70 80 ns
R2 t
AVQV
Address to Output Delay 3,4 70 80 ns
R3 t
ELQV
CE# to Output Delay 1,3,4 70 80 ns
R4 t
GLQV
OE# to Output Delay 1,3,4 20 20 ns
R5 t
PHQV
RP# to Output Delay 3,4 150 150 ns
R6 t
ELQX
CE#toOutputinLowZ 2,3,4 0 0 ns
R7 t
GLQX
OE# to Output in Low Z 2,3,4 0 0 ns
R8 t
EHQZ
CE#toOutputinHighZ 2,3,4 20 20 ns
R9 t
GHQZ
OE# to Output in High Z 2,3,4 20 20 ns
R10 t
OH
Output Hold from Address, CE#, or OE#
Change, Whichever Occurs First
2,3,4 0 0 ns
NOTES:
1.OE#maybedelayeduptot
ELQV–
t
GLQV
after the falling edge of CE# without impact on t
ELQV
.
2. Sampled, but not 100% tested.
3. See Figure 8, “Read Operation Waveform” on page 42.
4. See Figure 11, “AC Input/Output Reference Waveform” on page 49 for timing measurements and
maximum allowable input slew rate.
Figure 8. Read Operation Waveform
R5
R10
R7
R6
R9R4
R8R3
R1
R2
R1
ddress [A]
CE# [E]
OE# [G]
WE# [W]
Data [D/Q]
RST # [P]
