Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

SY100S325JC

Part # SY100S325JC
Description IC TRANSLATOR HEX LP 28-PLCC
Category IC
Availability In Stock
Qty 26
Qty Price
1 - 5 $10.62108
6 - 10 $8.44858
11 - 16 $7.96581
17 - 21 $7.40257
22 + $6.59794
Manufacturer Available Qty
SYNERGY
Date Code: 9722
  • Shipping Freelance Stock: 23
    Ships Immediately
SYNERGY
Date Code: 0050
  • Shipping Freelance Stock: 1
    Ships Immediately
SYNERGY
Date Code: 0012
  • Shipping Freelance Stock: 2
    Ships Immediately



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

LOW-POWER HEX
ECL-to-TTL
TRANSLATOR
DESCRIPTION
FEATURES
Max. propagation delay of 3.7ns
I
EE min. of –37mA
TTL outputs
Extended supply voltage option:
VEE = –4.2V to –5.5V
25% faster than National's 325
Differential inputs with built-in offset
Voltage and temperature compensation for improved
noise immunity
VBB output for single-ended use
Internal 75K input pull-down resistors
Function and pinout compatible with Fairchild F100K
Available in 24-pin CERPACK and 28-pin PLCC
packages
The SY100S325 are hex translators for converting
100K ECL logic levels to TTL logic levels. Inputs can be
used as inverting, non-inverting or differential receivers.
An internal reference voltage generator provides VBB for
single-ended operation or for use in Schmitt trigger
applications. All inputs have 75K pull-down resistors.
The outputs will go LOW when the inputs are either open
or have the same potential.
When used in single-ended operation, the apparent
input threshold of the true inputs is 20mV to 40mV higher
(positive) than the threshold of the complementary inputs.
The VTTL and VEE power may be applied in either order.
SY100S325
PIN NAMES
Pin Function
D0–D5 Data Inputs
D0–D5 Inverting Data Inputs
Q0–Q5 Data Outputs
VEES VEE Substrate
VTTL TTL VCC Power Supply
V
CCA VCCO for ECL Outputs
18
17
16
15
14
13
12
5
6
7891011
2
3
4
1
Top View
Flatpack
F24-1
24 23 22 21 20 19
V
CC
V
CC
Q
1
V
TTL
Q
2
V
TTL
D
5
Q
4
Q
5
Q
3
D
4
D
5
Q
0
D
0
D
1
D
0
D
1
D
2
D
3
V
EE
V
B
B
D
4
D
2
D
3
Rev.: F Amendment: /0
Issue Date: July, 1999
PIN CONFIGURATIONS
18
17
16
15
14
13
12
567891011
26
27
28
1
2
3
4
Top View
PLCC
J28-1
25
24 23 22 21 20 19
V
TTL
V
CC
V
CC
V
CC
Q
2
Q
1
V
TTL
D
0
V
EES
D
1
Q
0
D
0
D
1
D
2
D
4
D
3
V
EES
V
EE
V
BB
D
2
D
3
V
EES
D
5
Q
4
Q
3
Q
5
D
4
D
5
BLOCK DIAGRAM
D
0
Q
0
D
0
D
1
Q
1
D
1
D
2
Q
2
D
2
D
3
Q
3
D
3
D
4
Q
4
D
4
D
5
Q
5
D
5
V
BB
1
2
SY100S325
Micrel
AC ELECTRICAL CHARACTERISTICS
PLCC/FLATPACK
VEE = 4.2V to 5.5V unless otherwise specified, VCC = VCCA = GND, VTTL = +4.5V to +5.5V
Symbol Parameter Min. Typ. Max. Unit Condition
t
PLH Propagation Delay 900 2100 2900 ps CL = 15pF, Figure 2
tPHL Data to Output
t
PLH Propagation Delay 900 3100 3700 ps CL = 50pF, Figure 2
tPHL Data to Output
DC ELECTRICAL CHARACTERISTICS
VEE = 4.2V to 4.8V unless otherwise specified, VCC =VCCA = GND, VTTL = +4.5V to +5.5V
Symbol Parameter Min. Typ. Max. Unit Condition
V
OH Output HIGH Voltage 2.5 —— VIOH = 2.0mA VIN = VIH (Max.)
VOL Output LOW Voltage ——0.5 V IOL = 24mA VIN = VIL (Min.)
VDIFF Input Voltage Differential 150 ——mV Required for Full Output Swing
VCM Common Mode Voltage ——1.0 V Permissible ±VCM with Respect to VBB
IIH Input HIGH Current ——350 µAVIN = VIH (Max.), D0D5 = VBB, D0D5 = VIL (Min.)
IIL Input LOW Current 0.5 —— µAVIN = VIH (Min.), D0D5 = VBB
IOS Output Short Circuit Current 150 80 60 mA VOUT = GND
IEE VEE Power Supply Current 37 24 17 mA D0D5 = VBB
ITTL VTTL Power Supply Current 42 65 mA D0D5 = VBB
VBB Ouptut Reference Voltage 1380 1320 1260 mV IVBB = 2.1mA
V
IH Single-Ended Input HIGH 1165 —–880 mV Guaranteed HIGH Signal for All Inputs (with One
Voltage Tied to VBB)
V
IL Single-Ended Input LOW 1810 —–1475 mV Guaranteed LOW Signal for All Inputs (with One
Voltage Tied to VBB)
3
SY100S325
Micrel
SWITCHING WAVEFORM
Figure 1. Propagation Delay
t
PLH
INPUT
ATTENUATED
OUTPUT
50%
0.7 ± 0.1 ns0.7 ± 0.1 ns
0.95V
20%
80%
50%
1.69V
t
PHL
TEST CIRCUITS
SCOPE
CHAN B
VBB
VTTL
VEEVCC
0.1
µ
F
OPEN
RT
CL
RT
450
L2
PULSE
GENERATOR
SCOPE
CHAN A
L1
Figure 2. AC Test Circuit for 15pF Loading
NOTES:
VCC = 0V, VEE = 4.5V, VTTL = +5V
L1 and L2 = equal length 50 impedance lines
RT = 50 terminator internal to scope
Decoupling 0.1µF from GND to VCC, VEE and VTTL
All unused outputs are loaded with 500 to GND
CL = Fixture and stray capacitance = 3pF
PRODUCT ORDERING CODE
Ordering Package Operating
Code Type Range
SY100S325FC F24-1 Commercial
SY100S325JC J28-1 Commercial
SY100S325JCTR J28-1 Commercial
NOTE:
VEE = 4.2V to 5.5V unless otherwise specified, VCC = VCCA = GND
12NEXT