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SY100H607JC

Part # SY100H607JC
Description IC REGISTERED HEX 6-BIT 28-PLCC
Category IC
Availability In Stock
Qty 2
Qty Price
1 + $5.03270
Manufacturer Available Qty
SYNERGY
Date Code: 9716
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

DESCRIPTION
FEATURES
Differential PECL data and clock inputs
48mA sink, 15mA source TTL outputs
Single +5V power supply
Multiple power and ground pins to minimize noise
Specified within-device skew
VBB output for single-ended use
Fully compatible with Motorola MC10H/100H607
Available in 28-pin PLCC package
The SY10/100H607 are 6-bit, registered, dual supply
PECL-to-TTL translators. The devices feature differential
PECL inputs for both data and clock. The TTL outputs
feature 48mA sink, 15mA source drive capability for
driving high fanout loads. The asynchronous master reset
control is a PECL level input.
With its differential PECL inputs and TTL outputs, the
H607 device is ideally suited for the receive function of a
HPPI bus-type board-to-board interface application. The
on-chip registers simplify the task of synchronizing the
data between the two boards.
The device is available in either ECL standard: the
10H device is compatible with 10K logic levels, while the
100H device is compatible with 100K logic levels.
BLOCK DIAGRAM PIN CONFIGURATION
SY10H607
SY100H607
Rev.: F Amendment: /1
Issue Date: February, 1998
DQ
R
CLK
D
n
CLK
CLK
Q
n
MR
V
BB
1 OF 6 BITS
D
n
1
8
1
7
1
6
15
1
4
1
3
12
567891011
26
27
28
1
2
3
4
TOP VIEW
PLCC
25
24 23 22 21 20 19
Q4
TGND
Q
5
VCCT
Q3
VCCT
MR
Q2
Q1
Q0
CLK
V
BB
TGND
CLK
D1
D2
D0
EGND
D
0
D1
D2
D5
D4
VCCE
D3
D3
D4
D5
REGISTERED HEX
PECL-TO-TTL
Pin Function
D0 – D5 True PECL Data Inputs
D0 – D5 Inverted PECL Data Inputs
CLK, CLK Differential PECL Clock Input
MR PECL Master Reset Input
Q0 – Q5 TTL Outputs
VCCE PECL VCC (5.0V)
VCCT TTL VCC (5.0V)
TGND TTL Ground
EGND PECL Ground
V
BB VBB Reference Output (PECL)
PIN NAMES
1
2
SY10H607
SY100H607
Micrel
Dn MR TCLK/CLK Qn + 1
LLZL
HLZH
XHXL
TRUTH TABLE
Z = Low to High Transition.
TA= 0°CTA= +25°CTA= + 85°C
Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition
I
EE PECL Power Supply Current mA
10H 70 85 70 85 70 85
100H 65 80 70 85 75 95
ICCL TTL Supply Current 100 120 100 120 100 120 mA
ICCH TTL Supply Current 100 120 100 120 100 120 mA
IOS Output Short Circuit Current –100 –225 –100 –225 –100 –225 mA
VCCT = VCCE = 5.0V ±5%
DC ELECTRICAL CHARACTERISTICS
10H PECL DC ELECTRICAL CHARACTERISTICS
(1)
VCCT = VCCE = 5.0V ±5%
TA= 0°CTA= +25°CTA= + 85°C
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition
IIH Input HIGH Current 225 145 145 µA
IIL Input LOW Current 0.5 0.5 0.5 µA
VIH Input HIGH Voltage 3830 4160 3870 4190 3930 4280 mV VCCT = 5.0V
VIL Input LOW Voltage 3050 3520 3050 3520 3050 3555 mV VCCT = 5.0V
VBB Output Bias Voltage 3620 3730 3650 3750 3690 3810 mV VCCT = 5.0V
NOTE:
1. PECL VIL, VIH, VOL, VOH, VBB are given for VCCT = VCCE = 5.0V and will vary 1:1 with power supply.
100H PECL DC ELECTRICAL CHARACTERISTICS
(1)
VCCT = VCCE = 5.0V ±5%
TA= 0°CTA= +25°CTA= + 85°C
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition
IIH Input HIGH Current 225 145 145 µA
IIL Input LOW Current 0.5 0.5 0.5 µA
VIH Input HIGH Voltage 3835 4120 3835 4120 3835 4120 mV VCCT = 5.0V
VIL Input LOW Voltage 3190 3525 3190 3525 3190 3525 mV VCCT = 5.0V
V
BB Output Bias Voltage 3620 3740 3620 3740 3620 3740 mV VCCT = 5.0V
NOTE:
1. PECL VIL, VIH, VOL, VOH, VBB are given for VCCT = VCCE = 5.0V and will vary 1:1 with power supply.
3
SY10H607
SY100H607
Micrel
10H/100H TTL DC ELECTRICAL CHARACTERISTICS
(1)
TA= 0°CTA= +25°CTA= + 85°C
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition
V
OH Output HIGH Voltage 2.5 2.5 2.5 V IOH = –15mA
2.0 2.0 2.0 IOH = –24mA
V
OL Output LOW Voltage 0.55 0.55 0.55 V IOL = 48mA
VCCT = VCCE = 5.0V ±5%
NOTE:
1. DC levels such as V
OH, VOL, etc., are standard for PECL and FAST devices, with the exceptions of: IOL =48mA at 0.5 VOL; and IOH = 24mA at 2.0 VOH.
TA= 0°CTA= +25°CTA= + 85°C
Symbol Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition
t
PLH Propagation Delay ns CL = 50 pF
tPHL to Output CLK to Q 6.0 6.0 6.0
MR to Q 6.0 6.0 6.0
tskpp Part-to-Part Skew
(1,4)
0.5 0.5 0.5 ns CL = 50pF
tskew++ Within-Device Skew
(2,4)
0.3 0.3 0.3 ns CL = 50pF
tskew– – Within-Device Skew
(3,4)
0.3 0.3 0.3 ns CL = 50pF
tS Set-up Time 0.200 0.200 0.200 ns
tH Hold Time 0.500 0.500 0.500 ns
t
PW Minimum Pulse Width ns
CLK, MR 1.0 1.0 1.0
VPP Minimum Input Swing 200 150 200 150 200 150 mV
t
r Rise/Fall Time 1.5 1.5 1.5 ns CL = 50pF
tf 1.0V to 2.0V
f
MAX Max. Input Frequency
(5,6)
160 160 160 MHz
AC ELECTRICAL CHARACTERISTICS
(1)
VCCT = VCCE = 5.0V ±5%
NOTES:
1. Device-to-Device Skew considering HIGH-to-HIGH transitions at common VCC level.
2. Within-Device Skew considering HIGH-to-HIGH transitions at common VCC level.
3. Within-Device Skew considering LOW-to-LOW transitions at common VCC level.
4. All skew parameters are guaranteed but not tested.
5. Frequency at which output levels will meet a 0.8V to 2.0V minimum swing.
6. The fMAX value is specified as the minimum guaranteed maximum frequency. Actual operational maximum frequency may be greater.
PRODUCT ORDERING CODE
Ordering Package Operating
Code Type Range
SY10H607JC J28-1 Commercial
SY10H607JCTR J28-1 Commercial
SY100H607JC J28-1 Commercial
SY100H607JCTR J28-1 Commercial
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