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SY100EL91
Micrel, Inc.
M9999-031306
hbwhelp@micrel.com or (408) 955-1690
DESCRIPTION
■ 620ps typical propagation delay
■ Fully differential design
■ Supports standard operation
■ Available in 20-pin SOIC package
The SY100EL91 is a triple PECL-to-ECL translator. It
receives standard voltage PECL signals and translates
them to different ECL output signals.
A VBB output is provided for interfacing with single
ended PECL signals at the input. If a single ended input
is to be used, the VBB output should be connected to the
D input. The active signal would then drive the D input.
When used, the VBB output should be bypassed to ground
via a 0.01µF capacitor. The VBB output is designed to act
as the switching reference for the EL91 under single
ended input switching conditions. As a result this pin can
only source/sink up to 0.5mA of current.
To accomplish the level translation the EL91 requires
three power rails. The VCC supply should be connected
to the positive supply, and the VEE pin should be
connected to the negative power supply. The GND pins
as expected are connected to the system ground plane.
Both VEE and VCC should be bypassed to ground via
0.01µF capacitors.
Under open input conditions, the D input will be biased
at VCC/2 and the D input will be pulled to GND. This
condition will force the Q output to a LOW, ensuring
stability.
FEATURES
TRIPLE
PECL-TO-ECL TRANSLATOR
Pin Function
Dn PECL Inputs
Qn ECL Outputs
PECL_V
BB PECL Reference Voltage Output
SY100EL91
PIN NAMES
Rev.: E Amendment: /0
Issue Date:
March 2006
