
INTERNAL OFFSET CORRECTION
NOISE PERFORMANCE
OFFSET TRIMMING
INPUT BIAS CURRENT RETURN PATH
10kW
OPA333
±10mV
AdjustmentRange
100W
100W
100 Am
1/2REF200
100 Am
1/2REF200
V+
V-
R
G
INA333
Ref
V
O
V
IN-
V
IN+
INA333
SBOS445 – JULY 2008 ......................................................................................................................................................................................................
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Table 1. Commonly-Used Gains and Resistor Values
DESIRED GAIN R
G
( Ω ) NEAREST 1% R
G
( Ω )
1 NC
(1)
NC
2 100k 100k
5 25k 24.9k
10 11.1k 11k
20 5.26k 5.23k
50 2.04k 2.05
100 1.01k 1k
200 502.5 499
500 200.4 200
1000 100.1 100
(1) NC denotes no connection. When using the SPICE model, the simulation will not converge unless a resistor is connected to the R
G
pins;
use a very large resistor value.
The INA333 internal op amps use an auto-calibration
technique with a time-continuous 350kHz op amp in
the signal path. The amplifier is zero-corrected every
The auto-calibration technique used by the INA333
8 µ s using a proprietary technique. Upon power-up,
results in reduced low frequency noise, typically only
the amplifier requires approximately 100 µ s to achieve
50nV/ √ Hz, (G = 100). The spectral noise density can
specified V
OS
accuracy. This design has no aliasing
be seen in detail in Figure 8 . Low frequency noise of
or flicker noise.
the INA333 is approximately 1 µ V
PP
measured from
0.1Hz to 10Hz, (G = 100).
Most applications require no external offset
adjustment; however, if necessary, adjustments can
The input impedance of the INA333 is extremely
be made by applying a voltage to the REF terminal.
high — approximately 100G Ω . However, a path must
Figure 33 shows an optional circuit for trimming the
be provided for the input bias current of both inputs.
output offset voltage. The voltage applied to REF
This input bias current is typically ± 70pA. High input
terminal is summed at the output. The op amp buffer
impedance means that this input bias current
provides low impedance at the REF terminal to
changes very little with varying input voltage.
preserve good common-mode rejection.
Input circuitry must provide a path for this input bias
current for proper operation. Figure 34 illustrates
various provisions for an input bias current path.
Without a bias current path, the inputs will float to a
potential that exceeds the common-mode range of
the INA333, and the input amplifiers will saturate. If
the differential source resistance is low, the bias
current return path can be connected to one input
(see the thermocouple example in Figure 34 ). With
higher source impedance, using two equal resistors
provides a balanced input with possible advantages
of lower input offset voltage as a result of bias current
and better high-frequency common-mode rejection.
Figure 33. Optional Trimming of Output Offset
Voltage
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