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SN75ALS160N

Part # SN75ALS160N
Description OCTAL GP BUS TRANSCEIVER/LINEAR, INTERFA - Rail/Tube
Category IC
Availability Out of Stock
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1 + $2.05180



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

SN55ALS160, SN75ALS160
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS
SLLS018D – JUNE 1986 – REVISED MAY 1995
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
switching characteristics over recommended range of operating free-air temperature, V
CC
= 5 V
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
MIN TYP
MAX UNIT
t
PLH
Propagation delay time, low- to high-level output
Terminal
Bus
C
L
= 30 pF,
7 20
ns
t
PHL
Propagation delay time, high- to low-level output
Terminal
B
u
s
L
,
See Figure 1
8 20
ns
t
PLH
Propagation delay time, low- to high-level output
Bus
Terminal
C
L
= 30 pF,
7 14
ns
t
PHL
Propagation delay time, high- to low-level output
B
u
s
Terminal
L
,
See Figure 2
9 14
ns
t
PZH
Output enable time to high level 19 30
t
PHZ
Output disable time from high level
TE
Bus
C
L
= 15 pF,
5 12
ns
t
PZL
Output enable time to low level
TE
B
u
s
L
,
See Figure 3
16 35
ns
t
PLZ
Output disable time from low level 9 20
t
PZH
Output enable time to high level 13 30
t
PHZ
Output disable time from high level
TE
Terminal
C
L
= 15 pF,
12 20
ns
t
PZL
Output enable time to low level
TE
Terminal
L
,
See Figure 4
12 20
ns
t
PLZ
Output disable time from low level 11 20
t
en
Output pullup enable time
PE
Bus
C
L
= 15 pF,
11 22
ns
t
dis
Output pullup disable time
PE
B
u
s
L
See Figure 5
6 12
ns
Typical values are at T
A
= 25°C.
PARAMETER MEASUREMENT INFORMATION
3 V
0
V
OH
V
OH
t
PHL
2.2 V
t
PLH
1.5 V
B Output
D Input
C
L
= 30 pF
[ = 50 pF]
(see Note B)
Output
5 V
[7 V]
200
[500 ]
B
3 V
PE
D
50
3 V
TE
Generator
(see Note A)
TEST CIRCUIT VOLTAGE WAVEFORMS
1 V
480
[500 ]
1.5 V
[ ] denotes the SN55ALS160 military test conditions.
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, t
r
6 ns, t
f
6 ns,
Z
O
= 50 .
B. C
L
includes probe and jig capacitance.
Figure 1. Terminal-to-Bus Test Circuit and Voltage Waveforms
SN55ALS160, SN75ALS160
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS
SLLS018D – JUNE 1986 – REVISED MAY 1995
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
3 V
0
V
OH
V
OL
t
PHL
t
PLH
1.5 V
D Output
B Input
D
TE
B
Output
4.3 V
[7 V]
50
Generator
(see Note A)
TEST CIRCUIT VOLTAGE WAVEFORMS
240
[500 ]
3 k
[500 ]
C
L
= 30 pF
[ = 50 pF]
(see Note B)
1.5 V
1.5 V 1.5 V
[ ] denotes the SN55ALS160 military test conditions.
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, t
r
6 ns, t
f
6 ns,
Z
O
= 50 .
B. C
L
includes probe and jig capacitance.
Figure 2. Bus-to-Terminal Test Circuit and Voltage Waveforms
TEST CIRCUIT VOLTAGE WAVEFORMS
0.5 V
1 V
90%
0
0.8 V
3.5 V
V
OL
V
OH
3 V
2 V
1.5 V1.5 V
B Output
S1 to GND
S2 Closed
B Output
S1 to 3 V
S2 Open
TE Input
S2
5 V
[7 V]
Output
S1
3 V
PE
B
D
50
TE
Generator
(see Note A)
t
PLZ
t
PHZ
t
PZL
t
PZH
C
L
= 15 pF
[ = 50 pF]
(see Note B)
200
[500 ]
480
[500 ]
[ ] denotes the SN55ALS160 military test conditions.
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, t
r
6 ns, t
f
6 ns,
Z
O
= 50 .
B. C
L
includes probe and jig capacitance.
Figure 3. TE-to-Bus Test Circuit and Voltage Waveforms
SN55ALS160, SN75ALS160
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVERS
SLLS018D – JUNE 1986 – REVISED MAY 1995
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
TEST CIRCUIT VOLTAGE WAVEFORMS
t
PLZ
t
PHZ
D Output
S1 to GND
S2 Closed
D Output
S1 to 3 V
S2 Open
TE Input
1 V
0.7 V
90%
V
OL
V
OH
4 V
0
0
3 V
1.5 V
S2
50
S1
3 V
Output
TE
B
D
Generator
(see Note A)
t
PZL
t
PZH
C
L
= 15 pF
[ = 50 pF]
(see Note B)
4.3 V
[7 V]
240
[500 ]
3 k
[500 ]
1.5 V
1.5 V
[ ] denotes the SN55ALS160 military test conditions.
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, t
r
6 ns, t
f
6 ns,
Z
O
= 50 .
B. C
L
includes probe and jig capacitance.
Figure 4. TE-to-Terminal Test Circuit and Voltage Waveforms
TEST CIRCUIT
Output
3 V
TE
PE
BD
Generator
(see Note A)
50
VOLTAGE WAVEFORMS
90%
0
V
OH
3 V
V
OL
0.8
2 V
t
dis
t
en
1.5 V
B Output
PE Input
C
L
= 15 pF
[ = 50 pF]
(see Note B)
R
L
= 480
[ = 500 ]
1.5 V
[ ] denotes the SN55ALS160 military test conditions.
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, t
r
6 ns, t
f
6 ns,
Z
O
= 50 .
B. C
L
includes probe and jig capacitance.
Figure 5. PE-to-Bus Test Circuit and Voltage Waveforms
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