SN754410
QUADRUPLE HALF-H DRIVER
SLRS007B – NOVEMBER 1986 – REVISED NOVEMBER 1995
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
electrical characteristics over recommended ranges of supply voltage and free-air temperature
(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
†
MAX UNIT
V
IK
Input clamp voltage I
I
= –12 mA –0.9 –1.5 V
I
OH
= –0.5 A V
CC2
–1.5 V
CC2
–1.1
V
OH
High-level output voltage
I
OH
= –1 A
V
CC2
–2
V
I
OH
= –1 A, T
J
= 25°C V
CC2
–1.8 V
CC2
–1.4
I
OL
= 0.5 A 1 1.4
V
OL
Low-level output voltage
I
OL
= 1 A
2
V
I
OL
= 1 A, T
J
= 25°C 1.2 1.8
p
p
I
OK
= –0.5 A V
CC2
+1.4 V
CC2
+2
OKH
-
v
u
u
v
I
OK
= 1 A V
CC2
+1.9 V
CC2
+2.5
p
p
I
OK
= 0.5 A –1.1 –2
OKL
w-
v
u
u
v
I
OK
= –1 A –1.3 –2.5
Off-state high-impedance-state
V
O
= V
CC2
500
OZ(off)
output current
V
O
= 0
–500
µ
I
IH
High-level input current V
I
= 5.5 V 10 µA
I
IL
Low-level input current V
I
= 0 –10 µA
All outputs at high level 38
I
CC1
Output supply current I
O
= 0
All outputs at low level 70
mA
All outputs at high impedance 25
All outputs at high level 33
I
CC2
Output supply current I
O
= 0
All outputs at low level 20
mA
All outputs at high impedance 5
†
All typical values are at V
CC1
= 5 V, V
CC2
= 24 V, T
A
= 25°C.
switching characteristics, V
CC1
= 5 V, V
CC2
= 24 V, C
L
= 30 pF, T
A
= 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
d1
Delay time, high-to-low-level output from A input 400 ns
t
d2
Delay time, low-to-high-level output from A input 800 ns
t
TLH
Transition time, low-to-high-level output 300 ns
t
THL
Transition time, high-to-low-level output
See Figure 1
300 ns
t
r
Rise time, pulse input
t
f
Fall time, pulse input
t
w
Pulse duration
t
en1
Enable time to the high level 700 ns
t
en2
Enable time to the low level
400 ns
t
dis1
Disable time from the high level
u
900 ns
t
dis2
Disable time from the low level 600 ns
