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SN74VMEH22501ADGGR

Part # SN74VMEH22501ADGGR
Description Bus XCVR Single 10-CH 3-ST 48-Pin TSSOP T/R - Tape and Ree
Category IC
Availability Out of Stock
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1 + $2.69950



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.


        
        
SCES620 – DECEMBER 2004
16
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
driver in slot 1, with one receiver in slot 21 (minimum load)
switching characteristics over recommended operating conditions for bus transceiver function
(unless otherwise noted) (see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN TYP
MAX UNIT
t
PLH
1A or 2A
1B or 2B
5.5 7.4
ns
t
PHL
1A or 2A
1B or 2B
5.3 7.4
ns
t
r
Transition time, B port (10%−90%)
3.9 3.4 4.4 ns
t
f
Transition time, B port (90%−10%)
3.7 3.4 4.8 ns
All typical values are at V
CC
= 3.3 V, T
A
= 25°C. All values are derived from TI-SPICE models.
All t
r
and t
f
times are taken at the first receiver.
switching characteristics over recommended operating conditions for UBT (unless otherwise
noted) (see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN TYP
MAX UNIT
t
PLH
3A
3B
5.8 7.9
ns
t
PHL
3A
3B
5.5 7.7
ns
t
PLH
LE
3B
5.9 8
ns
t
PHL
LE
3B
5.5 7.8
ns
t
PLH
CLKAB
3B
5.9 8.1
ns
t
PHL
CLKAB
3B
5.5 7.7
ns
t
r
Transition time, B port (10%−90%)
3.9 3.4 4.4 ns
t
f
Transition time, B port (90%−10%)
3.7 3.4 4.8 ns
All typical values are at V
CC
= 3.3 V, T
A
= 25°C. All values are derived from TI-SPICE models.
All t
r
and t
f
times are taken at the first receiver.
skew characteristics for bus transceiver for specific worst-case V
CC
and temperature within the
recommended ranges of supply voltage and operating free-air temperature (see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN TYP
MAX UNIT
t
sk(LH)
1A or 2A
1B or 2B
1.7
ns
t
sk(HL)
1A or 2A
1B or 2B
2.1
ns
t
sk(t)
§
1A or 2A 1B or 2B 1 ns
t
sk(pp)
1A or 2A 1B or 2B 0.2 2.1 ns
All typical values are at V
CC
= 3.3 V, T
A
= 25°C. All values are derived from TI-SPICE models.
§
t
sk(t)
− Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same
packaged device. The specifications are given for specific worst-case V
CC
and temperature and apply to any outputs switching in opposite
directions, both low to high (LH) and high to low (HL) [t
sk(t)
].

        
        
SCES620 – DECEMBER 2004
17
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
driver in slot 1, with one receiver in slot 21 (minimum load) (continued)
skew characteristics for UBT for specific worst-case V
CC
and temperature within the
recommended ranges of supply voltage and operating free-air temperature (see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN TYP
MAX UNIT
t
sk(LH)
3A
3B
2
ns
t
sk(HL)
3A
3B
2.3
ns
t
sk(LH)
CLKAB
3B
2.1
ns
t
sk(HL)
CLKAB
3B
2.4
ns
t
sk(t)
3A 3B 1
ns
t
sk(t)
CLKAB 3B 1
ns
t
sk(pp)
3A 3B 0.2 2.5
ns
t
sk(pp)
CLKAB 3B 0.2 2.9
ns
All typical values are at V
CC
= 3.3 V, T
A
= 25°C. All values are derived from TI-SPICE models.
t
sk(t)
− Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same
packaged device. The specifications are given for specific worst-case V
CC
and temperature and apply to any outputs switching in opposite
directions, both low to high (LH) and high to low (HL) [t
sk(t)
].
By simulating the performance of the device using the VME64x backplane (see Figure 3), the maximum peak current
in or out of the B-port output, as the devices switch from one logic state to another, was found to be equivalent to
driving the lumped load shown in Figure 4.
From Output
Under Test
LOAD CIRCUIT
235
165
390 pF
5 V
Figure 4. Equivalent AC Peak Output-Current Lumped Load

        
        
SCES620 – DECEMBER 2004
18
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
driver in slot 1, with one receiver in slot 21 (minimum load) (continued)
In general, the rise- and fall-time distribution is shown in Figure 5. Since VME devices were designed for use into
distributed loads like the VME64x backplane (B/P), there are significant differences between low-to-high (LH) and
high-to-low (HL) values in the lumped load shown in the PMI (see Figures 1 and 2).
5.0
5.2
5.4
5.6
5.8
6.0
6.2
6.4
HL
LH
Full B/P Load Minimum B/P Load PMI Lumped Load
Time − ns
Figure 5
Characterization-laboratory data in Figures 6 and 7 show the absolute ac peak output current, with different supply
voltages, as the devices change output logic state. A typical nominal process is shown to demonstrate the devices’
peak ac output drive capability.
Figure 6
3.15 3.30 3.45
Peak I
O(LH)
− mA
V
CC
− V
137
136
135
134
133
132
131
130
129
128
Figure 7
3.15 3.30 3.45
Peak I
O(HL)
− mA
V
CC
− V
162
160
158
156
154
152
150
148
146
144
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