SCDS087G − APRIL 1999 − REVISED APRIL 2005
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Member of the Texas Instruments
Widebus Family
D Designed to Be Used in Voltage-Limiting
Applications
D 6.5-Ω On-State Connection Between Ports
A and B
D Flow-Through Pinout for Ease of Printed
Circuit Board Trace Routing
D Direct Interface With GTL+ Levels
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
The SN74TVC16222A provides 23 parallel
NMOS pass transistors with a common gate. The
low on-state resistance of the switch allows
connections to be made with minimal propagation
delay.
The device can be used as a 22-bit switch, with the
gates cascaded together to a reference transistor.
The low-voltage side of each pass transistor is
limited to a voltage set by the reference transistor.
This is done to protect components with inputs
that are sensitive to high-state voltage-level
overshoots. (See Application Information in this
data sheet.)
All of the transistors in the TVC array have the same electrical characteristics; therefore, any one of them can
be used as the reference transistor. Because, within the device, the characteristics from transistor to transistor
are equal, the maximum output high-state voltage (V
OH
) is approximately the reference voltage (V
REF
), with
minimal deviation from one output to another. This is a benefit of the TVC solution over discrete devices.
Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the
low-voltage side, and the I/O signals are bidirectional through each FET.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
Tube SN74TVC16222DL
SSOP − DL
Tape and reel SN74TVC16222DLR
TVC16222A
−40°C to 85°C
TSSOP − DGG Tape and reel SN74TVC16222DGGR TVC16222A
TVSOP − DGV Tape and reel SN74TVC16222DGVR TW222A
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright 2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus and TI are trademarks of Texas Instruments.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
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GND
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
GATE
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
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